A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add eMMC card support for monaco"

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qctecmdr 2021-04-27 22:49:31 -07:00 • committed by Gerrit - the friendly Code Review server
commit cc00b977d2
3 changed files with 131 additions and 0 deletions
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51
qcom/monaco-pinctrl.dtsi
View file

@ -777,4 +777,55 @@
};
};
};
/* SDC pin type */
sdc1_on: sdc1_on {
clk {
pins = "sdc1_clk";
bias-disable;
drive-strength = <16>;
};
cmd {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <10>;
};
data {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <10>;
};
rclk {
pins = "sdc1_rclk";
bias-pull-down;
};
};
sdc1_off: sdc1_off {
clk {
pins = "sdc1_clk";
bias-disable;
drive-strength = <2>;
};
cmd {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <2>;
};
data {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <2>;
};
rclk {
pins = "sdc1_rclk";
bias-pull-down;
};
};
};

16
qcom/monaco-rumi.dtsi
View file

@ -14,3 +14,19 @@
};
#include "monaco-stub-regulator.dtsi"
&sdhc_1 {
status = "ok"
cap-mmc-highspeed;
max-frequency = <50000000>;
vdd-supply = <&L25A>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <0 270000>;
vdd-io-supply = <&L15A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 250000>;
};

64
qcom/monaco.dtsi
View file

@ -21,6 +21,7 @@
aliases {
serial0 = &qupv3_se6_2uart;
hsuart0 = &qupv3_se5_4uart;
sdhc0 = &sdhc_1; /*SDC1 eMMC slot*/
};
firmware: firmware {};
@ -1013,6 +1014,69 @@
interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
rpm-channel-type = <15>; /* SMD_APPS_RPM */
};
sdhc_1: sdhci@4744000 {
compatible = "qcom,sdhci-msm-v5";
reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
reg-names = "hc_mem", "cqhci_mem";
iommus = <&apps_smmu 0xC0 0x0>;
qcom,iommu-dma = "bypass";
interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_ICE_CORE_CLK>;
clock-names = "core", "iface", "ice_core";
qcom,ice-clk-rates = <300000000 100000000>;
interconnects = <&system_noc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_1>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <8>;
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-KBps =
/* No vote */
<0 0>, <0 0>,
/* 400 KB/s*/
<1046 1600>,<1600 1600>,
/* 25 MB/s */
<25600 250000>,<50000 133320>,
/* 50 MB/s */
<51200 250000>,<65000 133320>,
/* 100 MB/s */
<102400 250000>,<65000 133320>,
/* 200 MB/s */
<204800 800000>,<200000 300000>,
/* 400 MB/s */
<204800 800000>,<200000 300000>,
/* Max. bandwidth */
<1338562 4096000>,<1338562 4096000>;
qcom,bus-bw-vectors-bps = <0 400000 25000000 50000000
100750000 200000000 400000000 4294967295>;
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x000F642E 0x0 0x01 0x2c010800 0x80040868>;
no-sd;
no-sdio;
bus-width = <8>;
non-removable;
supports-cqe;
status = "disabled";
qos0 {
mask = <0x0f>;
vote = <43>;
};
};
};
#include "monaco-pinctrl.dtsi"