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ARM: dts: msm: Add device node for llcc node on SM6150

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Add device node for last level cache controller
on SM6150.

Change-Id: Id8e6c6ded90e02e594f583aac179222fae359bf5
This commit is contained in:
Saurabh Ambulkar 2020-09-25 10:47:37 +05:30 • committed by Gerrit - the friendly Code Review server
commit cf5f6f8f0e
2 changed files with 8 additions and 1 deletions
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2
bindings/arm/msm/qcom,llcc.txt
View file

@ -14,7 +14,7 @@ Properties:
Definition: must be "qcom,sdm845-llcc" or "qcom,lahaina-llcc"
or "qcom,shima-llcc" or "qcom,sdxlemur-llcc"
or "qcom,yupik-llcc" or "qcom,sm8150-llcc"
or "qcom,sdmshrike-llcc"
or "qcom,sdmshrike-llcc" or "qcom,sm6150-llcc"
"qcom,llcc-v2" must be appended for V2 hardware.
- reg:

7
qcom/sm6150.dtsi
View file

@ -1001,6 +1001,13 @@
clock-frequency = <32768>;
};
cache-controller@9200000 {
compatible = "qcom,sm6150-llcc";
reg = <0x9200000 0x50000> , <0x9600000 0x50000>;
reg-names = "llcc_base", "llcc_broadcast_base";
cap-based-alloc-and-pwr-collapse;
};
apps_rsc: rsc@18200000 {
label = "apps_rsc";
compatible = "qcom,rpmh-rsc";