Merge "ARM: dts: msm: Open NOM_L1 gpu powerlevel for A660 v1"

This commit is contained in:
qctecmdr 2020-07-04 10:39:43 -07:00 • committed by Gerrit - the friendly Code Review server
commit cf61e1e193

View file

@ -31,7 +31,7 @@
qcom,chipid = <0x06060000>;
qcom,initial-pwrlevel = <4>;
qcom,initial-pwrlevel = <5>;
qcom,no-nap;
@ -121,8 +121,8 @@
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <676000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,gpu-freq = <710000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <11>;
@ -135,6 +135,20 @@
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <676000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <11>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <10>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <608000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@ -147,8 +161,8 @@
qcom,bus-max-ddr8 = <11>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <540000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@ -161,8 +175,8 @@
qcom,bus-max-ddr8 = <9>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@ -175,8 +189,8 @@
qcom,bus-max-ddr8 = <9>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <315000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;