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ARM: dts: msm: Add apb_pclk to GMU clock list for Shima

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apb_pclk is required to access QDSS registers. GMU need to add vote
before access can be made.

Change-Id: I26852622c0c453f56fe6d238a478283a0879e410
This commit is contained in:
Deepak Kumar 2021-02-01 14:49:42 +05:30
commit d1f61b15be
1 changed files with 4 additions and 2 deletions
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6
qcom/shima-gpu.dtsi
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@ -576,10 +576,12 @@
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gpucc GPU_CC_AHB_CLK>,
<&gpucc GPU_CC_HUB_CX_INT_CLK>,
<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
<&aopcc QDSS_CLK>;
clock-names = "gmu_clk", "cxo_clk", "axi_clk",
"memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote";
"memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote",
"apb_pclk";
mboxes = <&qmp_aop 0>;
mbox-names = "aop";