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ARM: dts: msm: fix for Shima-CAMNOC RDI latency buffer corruption
This is a fix to handle line corruption on RDI stream by capping IPE clock to SVS. It will help to avoid back pressure on CAMNOC dur to IPE traffic. This gives more room to IFE RDI stream and hence avoid corruption. CRs-Fixed: 2887253 Change-Id: I8880c08d507ebb90b447815a241870d03fd24bec
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1 changed files with 3 additions and 3 deletions
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@ -1215,9 +1215,9 @@
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clock-rates =
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<0 0 0 300000000 0>,
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<0 0 0 450000000 0>,
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<0 0 0 525000000 0>,
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<0 0 0 700000000 0>,
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<0 0 0 700000000 0>;
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<0 0 0 450000000 0>,
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<0 0 0 450000000 0>,
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<0 0 0 450000000 0>;
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clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
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"turbo";
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status = "ok"
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