A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-09 05:39:54 -04:00
Code Issues Projects Releases Packages Wiki Activity

clk: qcom: clk-debug: Add support for enable mask for debug clk

Browse source 
The enable bit position could vary across targets. Add the
en_mask where the enable bit position could be supplied
for debug clock branch.

Change-Id: I9e910f53e4a13f701a3a37b640c4f72da164f6af
Signed-off-by: Shefali Jain <shefjain@codeaurora.org>
This commit is contained in:
Shefali Jain 2018-04-16 14:06:57 +05:30 • committed by David Collins
commit e08df66270
2 changed files with 12 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

12
drivers/clk/qcom/clk-debug.c
View file

@ -200,17 +200,19 @@ static void enable_debug_clks(struct clk_debug_mux *meas, u8 index)
{
int dbg_cc = meas->parent[index].dbg_cc;
meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA;
if (dbg_cc != GCC) {
/* Not all recursive muxes have a DEBUG clock. */
if (meas->parent[index].cbcr_offset != U32_MAX)
regmap_update_bits(meas->regmap[dbg_cc],
meas->parent[index].cbcr_offset,
CBCR_ENA, CBCR_ENA);
meas->en_mask, meas->en_mask);
}
/* Turn on the GCC_DEBUG_CBCR */
regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset,
CBCR_ENA, CBCR_ENA);
meas->en_mask, meas->en_mask);
}
@ -218,15 +220,17 @@ static void disable_debug_clks(struct clk_debug_mux *meas, u8 index)
{
int dbg_cc = meas->parent[index].dbg_cc;
meas->en_mask = meas->en_mask ? meas->en_mask : CBCR_ENA;
/* Turn off the GCC_DEBUG_CBCR */
regmap_update_bits(meas->regmap[GCC], meas->cbcr_offset,
CBCR_ENA, 0);
meas->en_mask, 0);
if (dbg_cc != GCC) {
if (meas->parent[index].cbcr_offset != U32_MAX)
regmap_update_bits(meas->regmap[dbg_cc],
meas->parent[index].cbcr_offset,
CBCR_ENA, 0);
meas->en_mask, 0);
}
}

5
drivers/clk/qcom/clk-debug.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2016, 2019, The Linux Foundation. All rights reserved. */
#ifndef __QCOM_CLK_DEBUG_H__
#define __QCOM_CLK_DEBUG_H__
@ -88,6 +88,8 @@ struct clk_src {
* @num_parents: number of parents
* @regmap: regmaps of debug mux
* @priv: private measure_clk_data to be used by debug mux
* @en_mask: indicates the enable bit mask at global clock
* controller debug mux.
* @debug_offset: debug mux offset.
* @post_div_offset: register with post-divider settings for the debug mux.
* @cbcr_offset: branch register to turn on debug mux.
@ -106,6 +108,7 @@ struct clk_debug_mux {
int num_parents;
struct regmap **regmap;
void *priv;
u32 en_mask;
u32 debug_offset;
u32 post_div_offset;
u32 cbcr_offset;