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ARM: dts: msm: Add initial device tree for Direwolf

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Add initial device trees to support the Direwolf platform
on RUMI and ADP-STAR platforms.

Change-Id: Ic5bf0d8221182c28a7ae136a16689ae836573026
This commit is contained in:
Anant Goel 2020-11-23 18:02:26 -08:00 • committed by Shreyas K K
commit e3270d4ab7
16 changed files with 413 additions and 0 deletions
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17
qcom/Makefile
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@ -355,6 +355,23 @@ dtb-$(CONFIG_QTI_QUIN_GVM) += sa8155-vm-la.dtb \
sa8195-vm-lv-lxc.dtb \
sa6155p-vm-la.dtb
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
dtbo-$(CONFIG_ARCH_DIREWOLF) += direwolf-ivi-rumi-overlay.dtbo \
direwolf-ivi-adp-star-overlay.dtbo \
direwolf-adas-rumi-overlay.dtbo \
direwolf-adas-adp-star-overlay.dtbo
direwolf-ivi-rumi-overlay.dtbo-base := direwolf-ivi.dtb
direwolf-ivi-adp-star-overlay.dtbo-base := direwolf-ivi.dtb
direwolf-adas-rumi-overlay.dtbo-base := direwolf-adas.dtb
direwolf-adas-adp-star-overlay.dtbo-base := direwolf-adas.dtb
else
dtb-$(CONFIG_ARCH_DIREWOLF) += direwolf-ivi-rumi.dtb \
direwolf-ivi-adp-star.dtb \
direwolf-adas-rumi.dtb \
direwolf-adas-adp-star.dtb
endif
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

12
qcom/direwolf-adas-adp-star-overlay.dts Normal file
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@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "direwolf-adp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU ADAS ADP-STAR";
compatible = "qcom,direwolf-adas-adp-star", "qcom,direwolf-adas",
"qcom,direwolf", "qcom,adp-star";
qcom,msm-id = <461 0x10000>;
qcom,board-id = <25 0>;
};

11
qcom/direwolf-adas-adp-star.dts Normal file
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@ -0,0 +1,11 @@
/dts-v1/;
#include "direwolf-adas.dtsi"
#include "direwolf-adp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU ADAS ADP-STAR";
compatible = "qcom,direwolf-adas-adp-star", "qcom,direwolf-adas",
"qcom,direwolf", "qcom,adp-star";
qcom,board-id = <25 0>;
};

12
qcom/direwolf-adas-rumi-overlay.dts Normal file
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@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "direwolf-rumi-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU Rumi";
compatible = "qcom,direwolf-adas-rumi", "qcom,direwolf-adas",
"qcom,direwolf", "qcom,rumi";
qcom,msm-id = <461 0x10000>;
qcom,board-id = <0xF 0>;
};

11
qcom/direwolf-adas-rumi.dts Normal file
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@ -0,0 +1,11 @@
/dts-v1/;
#include "direwolf-adas.dtsi"
#include "direwolf-rumi-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU ADAS SoC RUMI";
compatible = "qcom,direwolf-adas-rumi", "qcom,direwolf-adas",
"qcom,direwolf", "qcom,rumi";
qcom,board-id = <0xF 0>;
};

9
qcom/direwolf-adas.dts Normal file
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@ -0,0 +1,9 @@
/dts-v1/;
#include "direwolf-adas.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU v1 ADAS SoC";
compatible = "qcom,direwolf-adas", "qcom,direwolf";
qcom,board-id = <0 0>;
};

7
qcom/direwolf-adas.dtsi Normal file
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@ -0,0 +1,7 @@
#include "direwolf.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU ADAS SoC";
compatible = "qcom,direwolf-adas", "qcom,direwolf";
qcom,msm-id = <461 0x10000>;
};

3
qcom/direwolf-adp-common.dtsi Normal file
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@ -0,0 +1,3 @@
&soc {
};

12
qcom/direwolf-ivi-adp-star-overlay.dts Normal file
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@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "direwolf-adp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI ADP-STAR";
compatible = "qcom,direwolf-ivi-adp-star", "qcom,direwolf-ivi",
"qcom,direwolf", "qcom,adp-star";
qcom,msm-id = <460 0x10000>;
qcom,board-id = <25 0>;
};

11
qcom/direwolf-ivi-adp-star.dts Normal file
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@ -0,0 +1,11 @@
/dts-v1/;
#include "direwolf-ivi.dtsi"
#include "direwolf-adp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI ADP-STAR";
compatible = "qcom,direwolf-ivi-adp-star", "qcom,direwolf-ivi",
"qcom,direwolf", "qcom,adp-star";
qcom,board-id = <25 0>;
};

12
qcom/direwolf-ivi-rumi-overlay.dts Normal file
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@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "direwolf-rumi-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI Rumi";
compatible = "qcom,direwolf-ivi-rumi", "qcom,direwolf-ivi",
"qcom,direwolf", "qcom,rumi";
qcom,msm-id = <460 0x10000>;
qcom,board-id = <0xF 0>;
};

11
qcom/direwolf-ivi-rumi.dts Normal file
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@ -0,0 +1,11 @@
/dts-v1/;
#include "direwolf-ivi.dtsi"
#include "direwolf-rumi-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI SoC RUMI";
compatible = "qcom,direwolf-ivi-rumi", "qcom,direwolf-ivi",
"qcom,direwolf", "qcom,rumi";
qcom,board-id = <0xF 0>;
};

9
qcom/direwolf-ivi.dts Normal file
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@ -0,0 +1,9 @@
/dts-v1/;
#include "direwolf-ivi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI SoC";
compatible = "qcom,direwolf-ivi", "qcom,direwolf";
qcom,board-id = <0 0>;
};

7
qcom/direwolf-ivi.dtsi Normal file
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@ -0,0 +1,7 @@
#include "direwolf.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DirewolfAU IVI SoC";
compatible = "qcom,direwolf-ivi", "qcom,direwolf";
qcom,msm-id = <460 0x10000>;
};

3
qcom/direwolf-rumi-common.dtsi Normal file
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@ -0,0 +1,3 @@
&soc {
};

266
qcom/direwolf.dtsi Normal file
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@ -0,0 +1,266 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Qualcomm Technologies, Inc. Direwolf";
compatible = "qcom,direwolf";
qcom,msm-name = "Direwolf V1";
interrupt-parent = <&intc>;
#address-cells = <2>;
#size-cells = <2>;
memory { device_type = "memory"; reg = <0 0 0 0>; };
aliases { };
cpus {
#address-cells = <2>;
#size-cells = <0>;
CPU0: cpu@0 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
L3_0: l3-cache {
compatible = "arm,arch-cache";
cache-level = <3>;
};
};
};
CPU1: cpu@100 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
next-level-cache = <&L2_1>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU2: cpu@200 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x200>;
enable-method = "psci";
next-level-cache = <&L2_2>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU3: cpu@300 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x300>;
enable-method = "psci";
next-level-cache = <&L2_3>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU4: cpu@400 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x400>;
enable-method = "psci";
next-level-cache = <&L2_4>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU5: cpu@500 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x500>;
enable-method = "psci";
next-level-cache = <&L2_5>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU6: cpu@600 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x600>;
enable-method = "psci";
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU7: cpu@700 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x700>;
enable-method = "psci";
next-level-cache = <&L2_7>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
};
cluster1 {
core0 {
cpu = <&CPU4>;
};
core1 {
cpu = <&CPU5>;
};
core2 {
cpu = <&CPU6>;
};
core3 {
cpu = <&CPU7>;
};
};
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc: soc { };
reserved_memory: reserved-memory { };
chosen { };
vendor: vendor { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
interrupt-controller;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
reg = <0x17a00000 0x10000>, /* GICD */
<0x17a60000 0x100000>; /* GICR * 8 */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
arch_timer: timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>;
};
memtimer: timer@17c20000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0x17c20000 0x1000>;
clock-frequency = <500000>;
frame@17c21000 {
frame-number = <0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c21000 0x1000>,
<0x17c22000 0x1000>;
};
frame@17c23000 {
frame-number = <1>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c23000 0x1000>;
status = "disabled";
};
frame@17c25000 {
frame-number = <2>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c25000 0x1000>;
status = "disabled";
};
frame@17c27000 {
frame-number = <3>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c27000 0x1000>;
status = "disabled";
};
frame@17c29000 {
frame-number = <4>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c29000 0x1000>;
status = "disabled";
};
frame@17c2b000 {
frame-number = <5>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c2b000 0x1000>;
status = "disabled";
};
frame@17c2d000 {
frame-number = <6>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x17c2d000 0x1000>;
status = "disabled";
};
};
};