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ARM: dts: msm: Pin config for AQR and Napa INTN_WOL

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Enable pin control for qps615 that is necessary to configure
the SDX65 GPIO pins for Wake on LAN support.

Change-Id: Ic5d6d76677e195fc3dec7780d99b5cf50718b8b1
This commit is contained in:
Manuel Gomez 2021-08-30 11:47:55 -07:00
commit ee63b78dc0
2 changed files with 34 additions and 0 deletions
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6
qcom/sdxlemur-mtp-cpe.dtsi
View file

@ -139,6 +139,9 @@
qps615_eth0,qps615_eth0@pcie0_rp {
reg = <0x0 0x0 0x0 0x0 0x0>;
pinctrl-names = "default";
pinctrl-0 = <&aqr_intn_wol_sig>;
compatible = "qcom,ioss-v2-device";
qcom,ioss = <&ioss>;
qcom,ioss_interfaces = <&ioss_qps615_eth0>;
@ -161,6 +164,9 @@
qps615_eth1,qps615_eth1@pcie0_rp {
reg = <0x100 0x0 0x0 0x0 0x0>;
pinctrl-names = "default";
pinctrl-0 = <&napa_intn_wol_sig>;
compatible = "qcom,ioss-v2-device";
qcom,ioss = <&ioss>;
qcom,ioss_interfaces = <&ioss_qps615_eth1>;

28
qcom/sdxlemur-pinctrl.dtsi
View file

@ -1699,5 +1699,33 @@
};
};
};
qps615_intn_wol {
aqr_intn_wol_sig: aqr_intn_wol_sig {
mux {
pins = "gpio103";
function = "gpio";
};
config {
pins = "gpio103";
input-enable;
bias-disable;
};
};
napa_intn_wol_sig: napa_intn_wol_sig {
mux {
pins = "gpio81";
function = "gpio";
};
config {
pins = "gpio81";
input-enable;
bias-disable;
};
};
};
};
};