Merge "ARM: dts: msm: Update PCIe0 PHY settings to v0.99 for lahaina v1"

This commit is contained in:
qctecmdr 2020-06-18 18:45:14 -07:00 • committed by Gerrit - the friendly Code Review server
commit ee8b68925c

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@ -114,7 +114,7 @@
qcom,phy-core-pll-en-mux = <7>;
qcom,phy-c-ready-status = <0x178>;
qcom,pcie-phy-ver = <10971>;
qcom,pcie-phy-ver = <10099>;
qcom,phy-status-offset = <0x214>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x240>;
@ -185,11 +185,11 @@
0x0654 0x00 0x0
0x06a8 0x0f 0x0
0x0044 0x04 0x0
0x0048 0xb0 0x0
0x0048 0xf0 0x0
0x0608 0x0f 0x0
0x0620 0xc1 0x0
0x0388 0xa8 0x0
0x10b0 0x18 0x0
0x0608 0x0f 0x0
0x0398 0x0b 0x0
0x02dc 0x05 0x0
0x0200 0x00 0x0