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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "clk: qcom: clk-rcg2: add callbacks to deal with voltage voting"
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commit
f138bb3bfa
1 changed files with 40 additions and 0 deletions
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@ -629,6 +629,10 @@ static void clk_rcg2_disable(struct clk_hw *hw)
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}
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const struct clk_ops clk_rcg2_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.enable = clk_rcg2_enable,
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.disable = clk_rcg2_disable,
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@ -642,6 +646,10 @@ const struct clk_ops clk_rcg2_ops = {
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EXPORT_SYMBOL_GPL(clk_rcg2_ops);
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const struct clk_ops clk_rcg2_floor_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -771,6 +779,10 @@ static int clk_edp_pixel_determine_rate(struct clk_hw *hw,
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}
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const struct clk_ops clk_edp_pixel_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -831,6 +843,10 @@ static int clk_byte_set_rate_and_parent(struct clk_hw *hw,
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}
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const struct clk_ops clk_byte_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -901,6 +917,10 @@ static int clk_byte2_set_rate_and_parent(struct clk_hw *hw,
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}
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const struct clk_ops clk_byte2_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -991,6 +1011,10 @@ static int clk_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
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}
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const struct clk_ops clk_pixel_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -1073,6 +1097,10 @@ static int clk_dp_determine_rate(struct clk_hw *hw,
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}
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const struct clk_ops clk_dp_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -1164,6 +1192,10 @@ static int clk_gfx3d_set_rate(struct clk_hw *hw, unsigned long rate,
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}
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const struct clk_ops clk_gfx3d_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.set_parent = clk_rcg2_set_parent,
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@ -1270,6 +1302,10 @@ static void clk_rcg2_shared_disable(struct clk_hw *hw)
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}
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const struct clk_ops clk_rcg2_shared_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.enable = clk_rcg2_shared_enable,
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.disable = clk_rcg2_shared_disable,
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.get_parent = clk_rcg2_get_parent,
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@ -1414,6 +1450,10 @@ clk_rcg2_dfs_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
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}
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static const struct clk_ops clk_rcg2_dfs_ops = {
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.prepare = clk_prepare_regmap,
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.unprepare = clk_unprepare_regmap,
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.pre_rate_change = clk_pre_change_regmap,
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.post_rate_change = clk_post_change_regmap,
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.is_enabled = clk_rcg2_is_enabled,
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.get_parent = clk_rcg2_get_parent,
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.determine_rate = clk_rcg2_dfs_determine_rate,
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