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ARM: dts: msm: correct the clock references for yupik target

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Correct the clock references for yupik target.

Change-Id: If1ef29498c827d11ab4c56cfff8bbb7505271946
This commit is contained in:
Rajat Gupta 2021-01-15 11:06:10 +05:30
commit f18535b30d
1 changed files with 7 additions and 8 deletions
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15
display/yupik-sde.dtsi
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@ -46,14 +46,14 @@
interrupts = <12 0>;
#clock-cells = <1>;
clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&clock_rpmh RPMH_CXO_CLK>,
<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
clocks = <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
<&sde_dp DP_PHY_PLL_VCO_DIV_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
clock-names = "core_aux_clk", "core_usb_ref_clk_src",
"core_usb_pipe_clk", "link_clk", "link_iface_clk",
"pixel_clk_rcg", "pixel_parent","strm0_pixel_clk";
@ -74,7 +74,6 @@
vdda-1p2-supply = <&L6B>;
vdda-0p9-supply = <&L1B>;
vdd_mx-supply = <&VDD_MXA_LEVEL>;
qcom,ctrl-supply-entries {
#address-cells = <1>;