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dt-bindings: clock: Add support for BLAIR clock controllers

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Update the GCC, GPUCC and DISPCC bindings for BLAIR device.

Change-Id: Icd841e4182dad6f0150a809a965cb82c94ddd26c
This commit is contained in:
Madhuri Medasani 2021-03-26 19:19:51 +05:30
commit f549366d31
3 changed files with 3 additions and 0 deletions
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1
bindings/clock/qcom,dispcc.txt
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@ -17,6 +17,7 @@ Required properties :
"qcom,sm6150-dispcc"
"qcom,sa6155-dispcc"
"qcom,monaco-dispcc"
"qcom,blair-dispcc"
- reg : shall contain base register location and length.
- #clock-cells : from common clock binding, shall contain 1.

1
bindings/clock/qcom,gcc.txt
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@ -39,6 +39,7 @@ Required properties :
"qcom,sa6155-gcc"
"qcom,monaco-gcc"
"qcom,direwolf-gcc"
"qcom,blair-gcc"
- reg : shall contain base register location and length
- vdd_cx-supply: The vdd_cx logic rail supply.

1
bindings/clock/qcom,gpucc.txt
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@ -13,6 +13,7 @@ Required properties :
"qcom,sm6150-gpucc",
"qcom,sa6155-gpucc".
"qcom,monaco-gpucc"
"qcom,blair-gpucc"
- reg: shall contain base register offset and size.
- reg-names: names of registers listed in the same order as in the reg property.