power: qpnp-qg: Add the SDAM flash-ocv offset

On PM2250 the PBS sequence expects the battery-OCV
to output the right flash-boost output voltage. Provide
the same in a SDAM offset.

Change-Id: I9d43375d96de5a199c6a87c55e5c1079549b23ee
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
This commit is contained in:
Anirudh Ghayal 2020-06-19 16:21:17 +05:30 • committed by Gerrit - the friendly Code Review server
commit fb5d9ede79
4 changed files with 14 additions and 0 deletions

View file

@ -128,6 +128,7 @@
#define QG_SDAM_ESR_DISCHARGE_SF_OFFSET 0x74 /* 2-byte 0x74-0x75 */
#define QG_SDAM_BATT_AGE_LEVEL_OFFSET 0x76 /* 1-byte 0x76 */
#define QG_SDAM_MAGIC_OFFSET 0x80 /* 4-byte 0x80-0x83 */
#define QG_SDAM_FLASH_OCV_OFFSET 0x84 /* 1-byte 0x84 */
#define QG_SDAM_MAX_OFFSET 0xA4
/* Below offset is used by PBS */

View file

@ -91,6 +91,11 @@ static struct qg_sdam_info sdam_info[] = {
.offset = QG_SDAM_MAGIC_OFFSET,
.length = 4,
},
[SDAM_FLASH_OCV] = {
.name = "SDAM_FLASH_OCV_OFFSET",
.offset = QG_SDAM_FLASH_OCV_OFFSET,
.length = 1,
},
};
int qg_sdam_write(u8 param, u32 data)

View file

@ -25,6 +25,7 @@ enum qg_sdam_param {
SDAM_ESR_DISCHARGE_SF,
SDAM_MAGIC,
SDAM_BATT_AGE_LEVEL,
SDAM_FLASH_OCV,
SDAM_MAX,
};

View file

@ -321,6 +321,7 @@ static int qg_store_soc_params(struct qpnp_qg *chip)
{
int rc, batt_temp = 0, i;
unsigned long rtc_sec = 0;
u32 flash_ocv = 0;
rc = get_rtc_time(&rtc_sec);
if (rc < 0)
@ -340,6 +341,12 @@ static int qg_store_soc_params(struct qpnp_qg *chip)
i, chip->sdam_data[i]);
}
/* store the SDAM OCV */
flash_ocv = chip->sdam_data[SDAM_OCV_UV] / 20000;
rc = qg_sdam_write(SDAM_FLASH_OCV, flash_ocv);
if (rc < 0)
pr_err("Failed to update flash-ocv rc=%d\n", rc);
return rc;
}