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ARM: dts: qcom: Update USB settings for L1 LPM on Lahaina

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The USB controller supports link power management (L1 LPM) for
high speed. Remove the "snps,dis_enblslpm_quirk" property which
disables that feature. While there, clean up the "snps,hird-threshold"
value as that is only supposed to be 4-bits; the 5th bit is set by a
separate property "snps,is-utmi-l1-suspend". These will allow for
maximum power savings when connected in USB 2.0 mode and L1 LPM
is supported for both host and peripheral modes.

Finally, remove the unused "usb-core-id" properties.

Change-Id: Ib9dc3a9c27d9a0f56dd0c75c8b7389ac44c9a7cb
This commit is contained in:
Jack Pham 2020-05-21 21:51:35 -07:00
commit ff0f02fa29
1 changed files with 4 additions and 6 deletions
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10
qcom/lahaina-usb.dtsi
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@ -66,13 +66,12 @@
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,ssp-u3-u0-quirk;
usb-core-id = <0>;
tx-fifo-resize;
maximum-speed = "super-speed-plus";
dr_mode = "otg";
@ -395,12 +394,11 @@
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
usb-core-id = <1>;
tx-fifo-resize;
maximum-speed = "super-speed";
dr_mode = "otg";