wakeup_source_register() expects a registered struct device *.
But in the subsys_register() path, device_register() is called
after wakeup_source_register(), which is incorrect. Hence,
flip the order of registrations. Also as an extension, reorder
the error-handling path of subsys_register() and the cleanup
sequence in subsys_unregister().
Change-Id: I976951ddcf5635ec7931253bfcda834ef30c3898
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Add camera clock driver to support camera
peripheral clocks.
Change-Id: I9d87129e9b08c884f75f0625d0edd83e339a4f9d
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
The stats for tmp allocs should be updated only if additional
buffers are available.
Change-Id: Ic064f87a54e37ef046d6761c79664e1ea830d04c
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
Currently, when handling the SPMI summary interrupt, the hw_irq
number is calculated based on SID, Peripheral ID, IRQ index and
APID. This is then passed to irq_find_mapping() to see if a
mapping exists for this hw_irq and if available, invoke the
interrupt handler. Since the IRQ index uses an "int" type, hw_irq
which is of unsigned long data type can take a large value when
SID has its MSB set to 1 and the type conversion happens. Because
of this, irq_find_mapping() returns 0 as there is no mapping
for this hw_irq. This ends up invoking cleanup_irq() as if
the interrupt is spurious whereas it is actually a valid
interrupt. Fix this by using the proper data type (u32) for id.
CRs-Fixed: 2357600
Change-Id: I451e33d61e063d3a9381c2b43767946117a5bbb9
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Have the qpnpint_irq_set_type function clear unwanted high/low
trigger bits when updating the interrupt flags.
Change-Id: Ie55d6178ea94350ecf8c79714cb863ea63d76ea6
Signed-off-by: Yimin Peng <yiminp@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Increase the SPMI transaction timeout delay from 100 us to
1000 us in order to account for the slower execution time
found on some simulator targets.
Change-Id: I5805fa77131336e56db35ae7948012e072c15746
Signed-off-by: David Collins <collinsd@codeaurora.org>
The system crashes due to an access permission violation when
writing to a PMIC peripheral which is not owned by the current
ee. Add a check for PMIC arbiter version 5 for such invalid
write requests and return an error instead of crashing the
system.
Change-Id: If601a8c737f10be2a7d1e894f7285cf0de4eb4a5
Signed-off-by: David Collins <collinsd@codeaurora.org>
Correct the way that duplicate PPID mappings are handled for PMIC
arbiter v5. The final APID mapped to a given PPID should be the
one which has write owner = APPS EE, if it exists, or if not
that, then the first APID mapped to the PPID, if it exists.
Change-Id: I387e25d5e0d29434a6191faaf887db1e1a90243d
Signed-off-by: David Collins <collinsd@codeaurora.org>
Current implementation of SPMI arbiter dispatches interrupt based on the
Arbiter's accumulator status, in some cases the accumulator status may
remain zero and the interrupt remains un-handled. Add logic to dispatch
interrupts based Arbiter's IRQ status if the accumulator status is zero.
Change-Id: I068f5c7d33758063878721d7cce1308fa803e3bd
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Signed-off-by: David Collins <collinsd@codeaurora.org>
Check that the apid for an SPMI interrupt falls between the
min_apid and max_apid that can be handled by the APPS processor
before invoking the per-apid interrupt handler:
periph_interrupt().
This avoids an access violation in rare cases where the status
bit is set for an interrupt that is not owned by the APPS
processor.
Change-Id: Ib74cb4ae7be9849f0243659bb4c1435340e1e087
Signed-off-by: David Collins <collinsd@codeaurora.org>
Currently, cleanup_irq() is invoked when a peripheral's interrupt
fires and there is no mapping present in the interrupt domain of
spmi interrupt controller.
The cleanup_irq clears the arbiter bit, clears the pmic interrupt
and disables it at the pmic in that order. The last disable in
cleanup_irq races with request_irq() in that it stomps over the
enable issued by request_irq. Fix this by not writing to the pmic
in cleanup_irq. The latched bit will be left set in the pmic,
which will not send us more interrupts even if the enable bit
stays enabled.
When a client wants to request an interrupt, use the activate
callback on the irq_domain to clear latched bit. This ensures
that the latched, if set due to the above changes in cleanup_irq
or when the bootloader leaves it set, gets cleaned up, paving way
for upcoming interrupts to trigger.
With this, there is a possibility of unwanted triggering of
interrupt right after the latched bit is cleared - the interrupt
may be left enabled too. To avoid that, clear the enable first
followed by clearing the latched bit in the activate callback.
Change-Id: If126d6f6cdf6c944ca513c53a71a91e225ee63e2
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
[collinsd@codeaurora.org: fix merge conflict]
Signed-off-by: David Collins <collinsd@codeaurora.org>
