Commit graph

3,241 commits

Author SHA1 Message Date
qctecmdr
111f2bcd7d Merge "ARM: dts: msm: keep PCIe in EQ Master Phase for at least 1ms on sdxlemur" 2020-11-23 23:23:26 -08:00
qctecmdr
b97cdd1765 Merge "ARM: dts: msm: Add dummy clock nodes for MONACO" 2020-11-23 19:13:31 -08:00
Saurabh Sahu
43876698d9 ARM: dts: msm: Add dummy clock nodes for MONACO
Dummy clock nodes are required for clocks client to
request, so add support for the same. Also add the
dummy GDSCs required by clients for monaco.

Change-Id: I16e204fb2c04cbe750db25af4364a8af0b252404
2020-11-23 17:39:19 +05:30
qctecmdr
d2558bf2ce Merge "ARM: dts: msm: Add missing memory map region for sdxlemur" 2020-11-23 03:49:18 -08:00
qctecmdr
fec81e9b29 Merge "ARM: dts: msm: Enable eMMC for sdxlemur target" 2020-11-23 03:49:18 -08:00
qctecmdr
1d9559f07e Merge "ARM: dts: msm: add spmi_debug_bus for sdxlemur" 2020-11-22 23:40:44 -08:00
qctecmdr
24c5370e70 Merge "ARM: dts: msm: Disable PMX65 VBUS_DET on sdxlemur MTP-MBB and RCM-RC boards" 2020-11-22 23:40:44 -08:00
qctecmdr
6f45296e08 Merge "ARM: dts: msm: specify thermal mitigation levels for sdxlemur platforms" 2020-11-22 23:40:43 -08:00
qctecmdr
8dd6512240 Merge "ARM: dts: msm: add gfx smmu node on yupik" 2020-11-22 23:40:43 -08:00
qctecmdr
c2378f1850 Merge "ARM: dts: msm: Add ion heap for monaco" 2020-11-21 06:18:43 -08:00
Patrick Daly
3d99d4f10d ARM: dts: msm: Add missing memory map region for sdxlemur
Correct the memory map to match version 1.

Change-Id: I2da959263e0d0805b75ecc78c79b76ffaa08f41b
2020-11-20 17:09:30 -08:00
Guru Das Srinagesh
e64f6ee14d ARM: dts: msm: Disable PMX65 VBUS_DET on sdxlemur MTP-MBB and RCM-RC boards
On these boards, VBUS detection is through PM7250B, so disable the
VBUS_DET peripheral.

Change-Id: If408b620c296df6bf1fbfeafb96b3e720de83114
2020-11-20 15:12:58 -08:00
qctecmdr
a98054dd60 Merge "ARM: dts: msm: Add CDSP pil node for Yupik" 2020-11-20 07:39:57 -08:00
qctecmdr
cb1c6a5c5f Merge "ARM: dts: msm: Enable SMMU and PSCI for scuba" 2020-11-20 03:39:33 -08:00
qctecmdr
152ce6a89f Merge "ARM: dts: msm: Add LPASS pil node for Yupik" 2020-11-20 03:39:33 -08:00
Vishwanath Raju K
8059e46e26 ARM: dts: msm: Add ion heap for monaco
Describe the memory region reserved for the ion allocator.

Change-Id: I53ce5c36dc77909fdbd8e1b2b24bd7292e6ef728
2020-11-19 20:42:55 -08:00
Subbaraman Narayanamurthy
1afeacbe78 ARM: dts: msm: specify thermal mitigation levels for sdxlemur platforms
Specify thermal mitigation levels for sdxlemur platforms based on
the battery used. This is used to limit charging current when
thermal SW requests different levels through charge_control_limit
property in battery power supply.

Change-Id: I2fe6142f110701b47d9f9f467a02632b20f1d7bb
2020-11-19 20:41:24 -08:00
Vishwanath Raju K
8ed3454a43 ARM: dts: msm: Add initial v1 memory map for Monaco
Added initial memory map and created regured cma areas
for monaco.

Change-Id: I3355fa9b9ec9b95b658e8f252b238cde2294c7fa
2020-11-19 20:37:44 -08:00
qctecmdr
b233067d93 Merge "ARM: dts: msm: Add PMX65 die temperature channel" 2020-11-19 20:09:40 -08:00
Charan Teja Kalla
ae0a35bb50 ARM: dts: msm: add gfx smmu node on yupik
Add the SMMU devicetree node for gfx that can be used by the respective
clients for VA to PA translations.

Change-Id: Ib0894591aff1be8fcdf50b0d57f7533efc67350c
2020-11-19 19:16:41 -08:00
Subbaraman Narayanamurthy
56ea625240 ARM: dts: msm: add spmi_debug_bus for sdxlemur
Add spmi_debug_bus so that PMIC peripherals can be accessed via
debug bus on sdxlemur devices where the fuse is not blown. This
is useful for debugging.

Change-Id: Ica647e8eee31028d25363aec88dd102cc0780ab6
2020-11-19 19:15:13 -08:00
Subbaraman Narayanamurthy
a30957a4f3 ARM: dts: msm: update pm7250b devices for sdxlemur platforms
Add necessary configurations needed for charger, QG, PD_PHY
devices present on PM7250B to support sdxlemur platforms that
uses them. Since, it needs some VADC channels from PM7250B, add
them as well.

Change-Id: I065f1365b7278a92e0a8646a32e955d5e168c70c
2020-11-19 19:13:27 -08:00
qctecmdr
b43b71a957 Merge "ARM: dts: msm: Remove display clock as client for CX SDPM for SHIMA" 2020-11-19 14:10:16 -08:00
qctecmdr
b9fad12223 Merge "ARM: dts: qcom: Update skin and cx thermal config for HOLI" 2020-11-19 14:10:15 -08:00
qctecmdr
35fbd3ae3c Merge "ARM: dts: msm: Update PCIe PHY settings to v1.02 for sdxlemur" 2020-11-19 10:34:31 -08:00
qctecmdr
1a07d416ae Merge "ARM: dts: msm: Add dmips and dynamic power co-efficient for Yupik" 2020-11-19 10:34:31 -08:00
qctecmdr
9705d86103 Merge "ARM: dts: msm: Include stub regulators for Monaco" 2020-11-19 10:34:31 -08:00
qctecmdr
435f4af199 Merge "ARM: dts: msm: Enable Kryo erp driver for Yupik" 2020-11-19 06:55:47 -08:00
qctecmdr
93026e5356 Merge "dt-bindings: clock: Add support for YUPIK clock controllers" 2020-11-19 06:55:47 -08:00
qctecmdr
e7f91c55e7 Merge "ARM: dts: msm: Add a new power level for supported devices" 2020-11-19 06:55:47 -08:00
Sarthak Garg
00a9c03d0f ARM: dts: msm: Enable eMMC for sdxlemur target
Enable eMMC for sdxlemur target.

Change-Id: I984fec01e0b99b189d1f2e299239336e77af966d
2020-11-19 17:52:13 +05:30
qctecmdr
c88791dda7 Merge "ARM: dts: msm: Enable touch for Dual DSI video mode on shima" 2020-11-19 03:06:14 -08:00
qctecmdr
63196ed3b1 Merge "ARM: dts: msm: Update USB3 DP QMP Phy sequence for Lahaina to v1.10" 2020-11-19 03:06:14 -08:00
Naina Mehta
1f4633b9d7 ARM: dts: msm: Add CDSP pil node for Yupik
Add CDSP pil node to support CDSP subsystem for Yupik.

Change-Id: I9b21026a278aa3794e89ae5fac425a644035ab41
2020-11-19 12:49:45 +05:30
Naina Mehta
6d404912ba ARM: dts: msm: Add LPASS pil node for Yupik
Add LPASS pil node to support LPASS subsystem for Yupik
platform.

Change-Id: I9d38b38f38e0fffa79844949d98fd9bf83ee6779
2020-11-18 22:58:40 -08:00
Naina Mehta
ce570f052b ARM: dts: msm: Add scm pas node
Add scm pas node for Yupik platform.

Change-Id: Id1c1e3032a57a5aef617baa80eeacf4411bf6192
2020-11-19 12:22:40 +05:30
qctecmdr
4f304a239e Merge "ARM: dts: msm: Add eMMC device tree files for sdxlemur" 2020-11-18 22:31:07 -08:00
qctecmdr
708685d0fe Merge "ARM: dts: msm: Include sdxlemur-mtp dt on all mtp trees" 2020-11-18 22:31:07 -08:00
qctecmdr
62ef84c8ac Merge "dt-bindings: arm: Add FUSE and DBGUI support" 2020-11-18 22:31:06 -08:00
qctecmdr
54fde202fc Merge "ARM: dts: msm: Add IOMMU Geometry property for storage" 2020-11-18 22:31:06 -08:00
qctecmdr
7967b94b1c Merge "ARM: dts: msm: Move firmware node ahead" 2020-11-18 22:31:06 -08:00
Archit Saxena
e4e4a2c0d9 ARM: dts: msm: Enable SMMU and PSCI for scuba
Enable SMMU, PSCI and correct compatible string
for scuba 32 bit target.

Change-Id: Ie4b35e7609d851146af4bb42ff46ff6ceae8cfe2
2020-11-19 11:32:10 +05:30
Guru Das Srinagesh
e293c8e60f ARM: dts: msm: Add PMX65 die temperature channel
Add the appropriate ADC channel so that the pmx65_tz thermal zone may
obtain the right value of PMIC die temperature for monitoring purposes.

Change-Id: Ib67624ddcafc7e46d94e8b9ca83938bde32005b9
2020-11-18 15:12:41 -08:00
Gopala Krishna Nuthaki
f7914087de ARM: dts: qcom: Update skin and cx thermal config for HOLI
Add quiet-therm,pa-therm0 and xo-therm skin sensors
thermal config for HOLI based on latest recomondations.

Add q6-hvx sensor thermal config mitigation for HOLI
based on latest recomondations.

Change-Id: If534b2c11786f89e165f3bae28b1f4b8c927c1ce
2020-11-18 07:50:11 -08:00
Gopala Krishna Nuthaki
d6c836abd3 ARM: dts: msm: Remove display clock as client for CX SDPM for SHIMA
Remove display clock as client for CX sdpm configuration
for SHIMA as support not available.

Change-Id: Ifabe6c7c5554179185e7a60cdc2dda0b3ec95619
2020-11-18 13:24:02 +05:30
qctecmdr
1ce62dc336 Merge "ARM: dts: msm: Add le-vm DT flag in lahaina TUI" 2020-11-17 17:05:47 -08:00
qctecmdr
326e012d06 Merge "ARM: dts: msm: update PCIe1 to support m.2 and generic EP on lahaina HDK" 2020-11-17 17:05:47 -08:00
qctecmdr
33b538d6ab Merge "ARM: dts: msm: add touch for 144hz panel" 2020-11-17 17:05:47 -08:00
Tony Truong
87d85b8221 ARM: dts: msm: keep PCIe in EQ Master Phase for at least 1ms on sdxlemur
PCIe PHY on sdxlemur requires the equalization master phase of
link training to be at least 1ms long before proceeding to the
next LTSSM state. Add the corresponding DT entry to configure
the controller to meet this requirement on sdxlemur.

Change-Id: Ied893d27cdc7a62c8a9284a9f16348ab8122094a
2020-11-17 16:48:11 -08:00
Tony Truong
44acda2f63 dt-bindings: arm: msm: add support for tuning PCIe EQ Master Phase
Add DT entry to determine the minimum amount of time PCIe needs to remain
in equalization master phase.

Change-Id: I14f0e0b28dd69b8b38ac7be1cae282635ef11fe5
2020-11-17 16:48:09 -08:00