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753,461 commits

Author SHA1 Message Date
Olof Johansson
171d429a1d Renesas ARM64 Based SoC DT Updates for v4.18
* Cleanups:
   - Corresct whitespace
   - sort subnodes of the root and soc nodes
 
 * R-Car M3-N (r8a77965) SoC
   - Describe MSIOF SPI, PWM, SDHI and I2C devices in DT
 
   - Add thermal support
 
 * R-Car H3 (r8a7795) and R-Car M3-W (r8a7796) SoCs
   - Decrease temperature hysteresis
 
     Niklas Söderlund says "... decrease the hysteresis from 2C to 1C for
     the two boards we have described upstream. They have no dependencies
     and are ready to be accepted if the review is in favor of them."
 
 * R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
   - Add address properties to rcar_sound port nodes
 
     The rcar_sound port nodes have unit names and thus should have register
     properties.
 
 * R-Car H3 (r8a7795), M3-W (r8a7796) V3M (r8a77970) and D3 (r8a77995) SoCs
   - Enable IPMMU devices
 
     Magnus Damm says "Following the policy of using DT to describe the
     hardware and not software support state, this series makes sure all
     IPMMU devices are enabled in DT for SoCs such as r8a7795, r8a7796,
     r8a77970 and r8a77995."
 
 * R-Car M3-N (r8a77965) and V3H (r8a77980) SoCs
   - Use sysc binding macros
 
     These can be used now that they are present in Linus's tree.
     This is a simple replacement of numeric values with symbolic ones.
 
   - Describe USB2 and USB3 devices in DT
 
 * R-Car V3M (r8a77970) SoC
   - Add SMP Support
 
     Geert Uytterhoeven says "This patch series enables SMP support on the
     R-Car V3M SoC, by adding the second Cortex-A53 CPU core.  It also adds
     the performance monitor unit, and links it to both CPU cores."
 
   - Correct IPMMU DS1 bit number
 
     Magnus Damm says "Judging by "R-Car-Gen3-rev0.80" IPMMU IMSSTR register
     documentation for [R-Car V3M] the DS1 bit field should be bit 0."
 
 * R-Car V3H (r8a77980) SoC
   - Use CPG clock binding macros
 
     These can be used now that they are present in Linus's tree.
     This is a simple replacement of numeric values with symbolic ones.
 
 * R-Car V3H (r8a77980) and V3M (r8a77970) SoCs
   - Disable EtherAVB
 
     Sergei Shtylov says "I'm fixing the issue in the EtherAVB device nodes
     in the R8A779{7|8}0 device trees that missed the "status" prop, usually
     disabling the SoC devices in anticipation that the board device trees
     enable the devices according to their needs. There should be no issues
     with the current R8A779{7|8}0 board device trees, as all of them use
     EtherAVB anyway, so I'm sending the patches generated against the
     'devel' branch..."
 
 * R-Car D3 (r8a77995) SoC
   - Describe VIN4 in DT
 
 * Ebisu board with R-Car E3 (r8a77990) SoC
   - Initial support:
     + PSCI
     + CPU (single)
     + Cache controller
     + Main clocks and controller
     + Interrupt controller
     + Timer
     + PMU
     + Reset controller
     + Product register
     + System controller
     + UART for console
 
 * Salvator-XS boards with R-Car H3 (r8a7795) SoC
   - Enable USB2.0 channel 3
 
 * Salvator-X and Salvator-XS boards with M3-N (r8a77965) SoC
   - Enable DU
 
     Kieran Bingham "This series enables the DU for the M3-N R8A77965 SoC,
     and provides output on the VGA and HDMI connectors.
 
     LVDS is not yet supported or tested."
 
 * Salvator-X and Salvator-XS boards with
   R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
   - Enable nable VIN, CSI-2 and ADV7482
 
     Niklas Söderlund says "This series enable capture for H3, M3-W, M3-N
     Salvator-X and Salvator-XS boards. It also adds the VIN and CSI-2 nodes
     for V3M, but as the ADV7482 is on the V3M expansion boards I have
     chosen not include that enablement in this series."
 
   - Add PMIC DDR Backup Power config
 
     Geert Uytterhoeven says " The ROHM BD9571MWV PMIC on the Renesas
     Salvator-X(S) and ULCB development boards supports DDR Backup Power,
     which means that the DDR power rails can be kept powered while the main
     SoC is powered down.
 
     For this to function correctly, the DDR Backup Power configuration
     must be described in DT, which is the topic of this series:
       - The first patch adds the missing device node for the BD9571 PMIC on
         the ULCB boards,
       - The last two patches add DDR Backup Mode configuration for
         Salvator-X(S) and ULCB."
 
   - Add EEPROM
 
     Wolfram Sang says "Add the EEPROM found on Salvator-X and -XS boards
     for H3, M3-W, and M3-N on the IIC_DVFS bus."
 
   - Enable HDMI Sound
 
 * Salvator-X and Salvator-XS boards with
   R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs, and
   Draak board with R-Car D3 (r8a77995) SoC
   - Consistently name EtherAVB mdio pin group
 
     Geert Uytterhoeven says "When initial support was added for R-Car H3,
     the MDIO pin was forgotten, and the MDC pin got its own group named
     "mdc".  During the addition of support for R-Car M3-W, this mistake was
     noticed.  But as R-Car H3 and M3-W are pin compatible, and can be
     mounted on the same boards, the decision was made to just add the MDIO
     pin to the existing "mdc" group.  Later this was extended to R-Car H3
     ES2.0, and M3-N, because of pin compatibility, and to R-Car D3, in the
     name of consistency among R-Car Gen3 SoCs.
 
     However, this decision keeps on being questioned when adding new SoC
     support.  Hence bite the bullet and admit our mistake, and rename the
     pin group from "mdc" to "mdio", like on R-Car Gen2 SoCs."
 
 * Ebisu board with R-Car E3 (r8a77990) SoC
   - Initial support: Memory, Main crystal, Serial console
 
   - Enable Ethernet
 
   - Revise PSCI node
 
     Yoshihiro Shimoda says "The basic support patch 2d2dbadba421 ("arm64:
     dts: renesas: Add Renesas R8A77990 SoC support") lacks the compatible
     "arm,psci-1.0" in the psci node."
 
   - Revise cache controller node
 
     Yoshihiro Shimoda says "The cache controller node should not have
     unit-addresses and reg properties."
 
 * V3HSK board with R-Car V3H (r8a77980) SoC
   - Initial board device tree
 
     Sergei Shtylov says "Add the initial device  tree for  the V3H Starter
     Kit board.  The board has 1 debug serial port (SCIF0); include support
     for it, so that the serial console can work."
 
   - Enable PFC support and use for EtherAVB
 
 * V3MSK board with R-Car V3M (r8a77970) SoC
   - Add DU/LVDS/HDMI support
 
     Sergei Shtylyov says "Define the V3M Starter Kit board dependent part
     of the DU and LVDS device nodes. Also add the device nodes for Thine
     THC63LVD1024 LVDS decoder and Analog Devices ADV7511W HDMI
     transmitter..."
 
   - Enable PFC for EtherAVB
 
 * Condor board with R-Car V3H (r8a77980) SoC
   - Enable eMMC
 
     Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
     device nodes and then enable eMMC support on the Condor board."
 
   - Enable PFC support and use for EtherAVB and SCIF0
 
 * Eagle board with R-Car V3M (r8a77970) SoC
   - Enable HDMI output
 
 * Eagle board with R-Car V3M (r8a77970) SoC and
   Condor board with R-Car V3H (r8a77980) SoC
   - Enable CAN-FD
 
     Adds the CAN-FD device nodes so the DT SoC files and enables
     single channel CAN-FD support in DT board files.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlr+pZkACgkQ189kaWo3
 T77FOhAAs+F25gyyQZ13/JE38Q+ku2gSrpJLwJJYjztez1EA9Jh15k7xlgU2uEaa
 +YtOodVHqL85LeHp8FMyahOmG6bh+pvqXjAc47ZVDootNm+518gdPvhZ0nWbWuYu
 SKskMN+W5pxkbDNUfIij3TCApAWEAQH4ExJxAMjTJc9ddTPmYKvOyWZTyQvm3qQA
 XsH0uOeDCmasRiJ9rUf6nPBCS4vn7U5w8cbRYQkDymrUmpEO8f+K6nMj+2yTvJJ/
 G0sA8R7Q/9ULRGs4XGadIcQ71xmwpBr13FKMC9xtlhI1NI6HIGo2RkHBRwD4mGay
 PgBhAQR4oekdyEoVwKu3KlTa3Fpohu/NbiwJMTu1QCgAtdd4MCv1RXq3QZIZtTQn
 V3FNVwaH2u4DaX814C2Dmj11zkcehc02uURzRU/pk5UmnIJ4utghu2RmpwO7YQX7
 LqBrzRFHd+Qt03Thp/fwbsdWPYvgrRDSL5v9VV/87RD0zJ9yQR/mjr4OyI5DT6g5
 bEcj535n9X3FY2SFjFWKl4BjuwOcTtiY15oFKdnFcBF2wobaiKO68YgvaYgFpHMD
 T5e+bOgq2IPKW8Z6qMboyj2z9a3oHa6xkEJMEJGKxotViQQC7JUHu3/7cknUelSs
 LP1cJy7IP/62Qb9lvUqJ70Py+L430cuHw6+/Ssf98sRaTx0VD2I=
 =4IoI
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm64-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late

Renesas ARM64 Based SoC DT Updates for v4.18

* Cleanups:
  - Correct whitespace
  - sort subnodes of the root and soc nodes
* R-Car M3-N (r8a77965) SoC
  - Describe MSIOF SPI, PWM, SDHI and I2C devices in DT
  - Add thermal support
* R-Car H3 (r8a7795) and R-Car M3-W (r8a7796) SoCs
  - Decrease temperature hysteresis
* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
  - Add address properties to rcar_sound port nodes
* R-Car H3 (r8a7795), M3-W (r8a7796) V3M (r8a77970) and D3 (r8a77995) SoCs
  - Enable IPMMU devices
* R-Car M3-N (r8a77965) and V3H (r8a77980) SoCs
  - Use sysc binding macros
  - Describe USB2 and USB3 devices in DT
* R-Car V3M (r8a77970) SoC
  - Add SMP Support
  - Correct IPMMU DS1 bit number
* R-Car V3H (r8a77980) SoC
  - Use CPG clock binding macros
* R-Car V3H (r8a77980) and V3M (r8a77970) SoCs
  - Disable EtherAVB
* R-Car D3 (r8a77995) SoC
  - Describe VIN4 in DT

* Ebisu board with R-Car E3 (r8a77990) SoC
  - Initial support
* Salvator-XS boards with R-Car H3 (r8a7795) SoC
  - Enable USB2.0 channel 3
* Salvator-X and Salvator-XS boards with M3-N (r8a77965) SoC
  - Enable DU
* Salvator-X and Salvator-XS boards with
  R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
  - Enable nable VIN, CSI-2 and ADV7482
  - Add PMIC DDR Backup Power config
  - Add EEPROM
  - Enable HDMI Sound
* Salvator-X and Salvator-XS boards with
  R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs, and
  Draak board with R-Car D3 (r8a77995) SoC
  - Consistently name EtherAVB mdio pin group
* Ebisu board with R-Car E3 (r8a77990) SoC
  - Initial support: Memory, Main crystal, Serial console
  - Enable Ethernet
  - Revise PSCI node
  - Revise cache controller node
* V3HSK board with R-Car V3H (r8a77980) SoC
  - Initial board device tree
  - Enable PFC support and use for EtherAVB
* V3MSK board with R-Car V3M (r8a77970) SoC
  - Add DU/LVDS/HDMI support
  - Enable PFC for EtherAVB
* Condor board with R-Car V3H (r8a77980) SoC
  - Enable eMMC
  - Enable PFC support and use for EtherAVB and SCIF0
* Eagle board with R-Car V3M (r8a77970) SoC
  - Enable HDMI output
* Eagle board with R-Car V3M (r8a77970) SoC and
  Condor board with R-Car V3H (r8a77980) SoC
  - Enable CAN-FD

* tag 'renesas-arm64-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (102 commits)
  arm64: dts: renesas: salvator-common: Add ADV7482 support
  arm64: dts: renesas: salvator-common: enable VIN
  arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7795-es1: add CSI-2 node
  arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a77965: add I2C support
  arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB
  arm64: dts: renesas: r8a77990: Add EthernetAVB device nodes
  arm64: dts: renesas: r8a77990: Add GPIO device nodes
  arm64: dts: renesas: r8a77990: Add PFC device node
  arm64: dts: renesas: initial V3HSK board device tree
  arm64: dts: renesas: r8a77980: disable EtherAVB
  arm64: dts: renesas: r8a77970: disable EtherAVB
  arm64: dts: renesas: r8a77995: Add VIN4
  arm64: dts: renesas: r8a77980: add resets property to CAN-FD node
  arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
  arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
  arm64: dts: renesas: r8a77965: Add SDHI device nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-06-02 01:30:07 -07:00
Olof Johansson
ae709bf8ad Qualcomm ARM Based Driver Updates for v4.18
* Various SMEM updates/fixes
 * Add qcom_smem_virt_to_phys SMEM API
 * Update MAINTAINERS to include qcom_scm pattern
 * Add Qualcomm Command DB driver
 * Add Qualcomm SCM compatible for IPQ4019
 * Add MSM8998 to smd-rpm compatible list
 * Add Qualcomm GENI based QUP wrapper
 * Fix Qualcomm QMI buffer sizing bug
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJbCHgwAAoJEFKiBbHx2RXVUHEP+wWnlsXvaoT50PRavwcW2Gbk
 OLWpWWeh90TRtuW9IZ+VXUhClVSvSBi+M46xKqO2M/0WumNRRE4dZDL3DjSqOBVZ
 2MQP+uhfviv5GqpEuPq18luedV6S0orsQY+FLmqD4+/vHW8oXUvC1m2iqsYkst27
 gtPYSiuVZkJDc0pvPzsFDFL5WBQ84W4ki2Jsc2xuf0clUxASoOfT8/RFyZ1M3suV
 R9hzOUCWY1+c+YZbvYyPTLu1Y20ksHcnfnhAc/ZUxGyzIWLX30XWjc26pJbF8eRU
 EJiI0pyPkzue4GokrWI1H9AOgmSoJjdMFg0uvz3Y6opreKJi5+GSiVZeojU7/e5a
 yNhrdF6R9jp5n/jwvql7yiMHwxiv8dzuSvvlQCJfEMVZBD2maPAojiXXOFs06pNg
 WdhKFO5x4XH+kkiUnDs7sXpT/Szd1Eqr9wsIxLj9pbH++0Z5TYpOjFkE948fiLa9
 QUywzT4TLD5/N4z4iIsE8Xd4Zm+jxlQ/1AEouegntkav0UgCeJsHlijGl2T5xrPC
 NDRSUpABI6Ypf+mDlxsVI+9WZm7o7PTAVUVnOrKF7FRZRNdGOLsrV0f5awJuyBgf
 XfhsOUm6IB3vzON2TrvVno7Fa4vdOFFGZsTbn8hdW2YSDpgLmebHZg20hAjXrImd
 8VB7e4tK0yPtweUfIg9U
 =hFnt
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/late

Qualcomm ARM Based Driver Updates for v4.18

* Various SMEM updates/fixes
* Add qcom_smem_virt_to_phys SMEM API
* Update MAINTAINERS to include qcom_scm pattern
* Add Qualcomm Command DB driver
* Add Qualcomm SCM compatible for IPQ4019
* Add MSM8998 to smd-rpm compatible list
* Add Qualcomm GENI based QUP wrapper
* Fix Qualcomm QMI buffer sizing bug

* tag 'qcom-drivers-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  soc: qcom: smem: introduce qcom_smem_virt_to_phys()
  soc: qcom: qmi: fix a buffer sizing bug
  MAINTAINERS: Update pattern for qcom_scm
  soc: Unconditionally include qcom Makefile
  soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
  soc: qcom: smem: fix qcom_smem_set_global_partition()
  soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
  soc: qcom: smem: byte swap values properly
  soc: qcom: smem: return proper type for cached entry functions
  soc: qcom: smem: fix first cache entry calculation
  soc: qcom: cmd-db: Make endian-agnostic
  drivers: qcom: add command DB driver
  soc: qcom: Add GENI based QUP Wrapper driver
  soc: qcom: smd-rpm: Add msm8998 compatible
  firmware: qcom: scm: Add ipq4019 soc compatible

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-26 11:51:55 -07:00
Alex Elder
6d361c1db7 soc: qcom: smem: introduce qcom_smem_virt_to_phys()
Create function qcom_smem_virt_to_phys(), which returns the physical
address corresponding to a given SMEM item's virtual address.  This
feature is required for a driver that will soon be out for review.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:59 -05:00
Alex Elder
7df5ff258b soc: qcom: qmi: fix a buffer sizing bug
In qmi_handle_init(), a buffer is allocated for to hold messages
received through the handle's socket.  Any "normal" messages
(expected by the caller) will have a header prepended, so the
buffer size is adjusted to accomodate that.

The buffer must also be of sufficient size to receive control
messages, so the size is increased if necessary to ensure these
will fit.

Unfortunately the calculation is done wrong, making it possible
for the calculated buffer size to be too small to hold a "normal"
message.  Specifically, if:

  recv_buf_size > sizeof(struct qrtr_ctrl_pkt) - sizeof(struct qmi_header)
		AND
  recv_buf_size < sizeof(struct qrtr_ctrl_pkt)

the current logic will use sizeof(struct qrtr_ctrl_pkt) as the
receive buffer size, which is not enough to hold the maximum
"normal" message plus its header.  Currently this problem occurs
for (13 < recv_buf_size < 20).

This patch corrects this.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:58 -05:00
Niklas Cassel
488de0317b MAINTAINERS: Update pattern for qcom_scm
Update pattern for qcom_scm, so that get_maintainer.pl will show the
correct maintainers + lists, not only for qcom_scm.c, but also for
the files: qcom_scm-32.c, qcom_scm-64.c, qcom_scm.h.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:57 -05:00
Guenter Roeck
cab673583d soc: Unconditionally include qcom Makefile
Incoming Qualcomm changes for GENI, i2c [1], and cmd-db [2] are enabled
with COMPILE_TEST in drivers/soc/qcom. For this to work, the Makefile
in that directory has to be included unconditionally, rather than only
if ARCH_QCOM is enabled.

Example of the errors seen on allmodconfig with the GENI, i2c, and
cmd-db patches applied:

Kernel: arch/x86/boot/bzImage is ready  (#1)
ERROR: "geni_se_select_mode" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_init" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_config_packing" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_resources_on" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_resources_off" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_tx_dma_unprep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_tx_dma_prep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_rx_dma_unprep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_rx_dma_prep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_select_mode" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_config_packing" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_init" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_resources_off" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_resources_on" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
make[1]: *** [scripts/Makefile.modpost:92: __modpost] Error 1
make: *** [Makefile:1237: modules] Error 2

[1] https://patchwork.ozlabs.org/cover/893437/
[2] https://lkml.org/lkml/2018/4/10/714

Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:57 -05:00
Alex Elder
11d2e7edac soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
There's no sense in scanning the partition table again if we know
the global partition has already been discovered.  Check for a
non-null global_partition pointer in qcom_smem_set_global_partition()
immediately.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:56 -05:00
Alex Elder
8fa1a21409 soc: qcom: smem: fix qcom_smem_set_global_partition()
If there is at least one entry in the partition table, but no global
entry, the qcom_smem_set_global_partition() should return an error
just like it does if there are no partition table entries.

It turns out the function still returns an error in this case, but
it waits to do so until it has mistakenly treated the last entry in
the table as if it were the global entry found.

Fix the function to return immediately if no global entry is found
in the table.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:55 -05:00
Alex Elder
8377f8181d soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
It's OK if the space for a newly-allocated uncached entry actually
touches the free cached space boundary.  It's only a problem if it
would cross it.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:55 -05:00
Alex Elder
04a512fea3 soc: qcom: smem: byte swap values properly
Two places report an error when a partition header is found to
not contain the right canary value.  The error messages do not
properly byte swap the host ids.  Fix this, and adjust the format
specificier to match the 16-bit unsigned data type.

Move the error handling for a bad canary value to the end of
qcom_smem_alloc_private().  This avoids some long lines, and
reduces the distraction of handling this unexpected problem.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:54 -05:00
Alex Elder
e221a1da97 soc: qcom: smem: return proper type for cached entry functions
What phdr_to_last_uncached_entry() returns is the address of the
start of the free space following all allocated uncached entries.
It really doesn't refer to an actual (initialized) private entry
structure.   Similarly phdr_to_last_cached_entry() returns the
address of the end of free space, preceding the last allocated cache
entry.  Change both functions' return type to be pointer to void
to reflect this.

Meanwhile, phdr_to_first_cached_entry() really *does* point to a
private entry structure, so change its return type to reflect
this fact.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:54 -05:00
Alex Elder
7070874973 soc: qcom: smem: fix first cache entry calculation
Cached items are found at the high end of an smem partition.  A
cached item's shared memory precedes the private entry structure
that describes it.

The address of the structure describing the first cached item should
be returned by phdr_to_first_cached_entry().  However the function
calculates the start address using the wrong structure size.

Fix this by computing the first item's entry structure address by
subtracting the size of a private entry structure rather than a
partition header structure.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:53 -05:00
Stephen Boyd
36b0aefdee soc: qcom: cmd-db: Make endian-agnostic
This driver deals with memory that is stored in little-endian format.
Update the structures with the proper little-endian types and then
do the proper conversions when reading the fields. Note that we compare
the ids with a memcmp() because we already pad out the string 'id' field
to exactly 8 bytes with the strncpy() onto the stack.

Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:52 -05:00
Mahesh Sivasubramanian
312416d917 drivers: qcom: add command DB driver
Command DB is a simple database in the shared memory of QCOM SoCs, that
provides information regarding shared resources. Some shared resources
in the SoC have properties that are probed dynamically at boot by the
remote processor. The information pertaining to the SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.

Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25 15:53:52 -05:00
Kieran Bingham
908001d778 arm64: dts: renesas: salvator-common: Add ADV7482 support
The Salvator boards use an ADV7482 receiver for HDMI and CVBS inputs.

Provide ADV7482 node on the i2c4 bus, along with connectors for the
hdmi and cvbs inputs, and link to the csi20 and csi40 nodes as outputs.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-18 11:52:03 +02:00
Niklas Söderlund
afa6dceca1 arm64: dts: renesas: salvator-common: enable VIN
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:22 +02:00
Niklas Söderlund
51b0932786 arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:22 +02:00
Niklas Söderlund
98b6badf77 arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:21 +02:00
Niklas Söderlund
0e5819f10b arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:21 +02:00
Niklas Söderlund
e51c09d537 arm64: dts: renesas: r8a7795-es1: add CSI-2 node
Renesas H3 ES1.0 have one extra CSI-2 node, CSI21 which is not present
for later ES versions of H3.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:20 +02:00
Niklas Söderlund
15da7132f1 arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:19 +02:00
Niklas Söderlund
111d3ffe16 arm64: dts: renesas: r8a77965: add I2C support
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:19 +02:00
Yoshihiro Shimoda
8441ef643d arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB
This patch enables EthernetAVB for r8a77990 Ebisu board.

Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:18 +02:00
Yoshihiro Shimoda
913a78b575 arm64: dts: renesas: r8a77990: Add EthernetAVB device nodes
This patch adds EthernetAVB node for r8a77990 (R-Car E3).

Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:18 +02:00
Yoshihiro Shimoda
0d292de1eb arm64: dts: renesas: r8a77990: Add GPIO device nodes
This patch adds GPIO nodes for r8a77990 (R-Car E3).

Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[simon: dropped use of deprecated "renesas,gpio-rcar"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:17 +02:00
Yoshihiro Shimoda
4ab0df3399 arm64: dts: renesas: r8a77990: Add PFC device node
This patch adds PFC device node for r8a77990 (R-Car E3).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:17 +02:00
Sergei Shtylyov
116a12f7d6 arm64: dts: renesas: initial V3HSK board device tree
Add the initial device  tree for  the V3H Starter Kit board.
The board has 1 debug serial port (SCIF0); include support for it,
so that the serial console can work.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:16 +02:00
Sergei Shtylyov
52d2e0cec7 arm64: dts: renesas: r8a77980: disable EtherAVB
When adding the R8A77980 EtherAVB device I failed to notice that it does
not have the usual "status" property disabling the described devices in
anticipation that the board device trees enable the devices according to
their needs. This causes the EtherAVB driver to successfully probe despite
e.g. the needed pins not having been configured -- luckily, "eth<n>" device
can't be opened anyway...

Fixes: bf6f90832f ("arm64: dts: renesas: r8a77980: add EtherAVB support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:15 +02:00
Sergei Shtylyov
9223eef03f arm64: dts: renesas: r8a77970: disable EtherAVB
When adding the R8A77970 EtherAVB device I failed to notice that it does
not have the usual "status" property disabling the described devices in
anticipation that the board device trees enable the devices according to
their needs. This causes the EtherAVB driver to successfully probe despite
e.g. the needed pins not having been configured -- luckily, "eth<n>" device
can't be opened anyway...

Fixes: bea2ab136e ("arm64: dts: renesas: r8a77970: add EtherAVB support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:15 +02:00
Jacopo Mondi
d86bd47fef arm64: dts: renesas: r8a77995: Add VIN4
Describe VIN4 interface for R-Car D3 R8A77995 SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
[simon: sorted node by bus address]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2018-05-16 10:47:14 +02:00
Simon Horman
22fb06cd54 arm64: dts: renesas: r8a77980: add resets property to CAN-FD node
Add resets property to CAN-FD node to describe it in the reset topology of
on-SoC devices.  This allows to reset the CAN-FD device using the Reset
Controller API.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-05-16 10:47:14 +02:00
Geert Uytterhoeven
d005b562be arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
Enable the performance monitor unit for the Cortex-A53 cores on the
R-Car V3M (r8a77970) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:13 +02:00
Geert Uytterhoeven
77899dd2c0 arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car V3M (r8a77970) SoC, and adjust the interrupt delivery masks for
ARM Generic Interrupt Controller and Architectured Timer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:12 +02:00
Takeshi Kihara
aa7a6365d0 arm64: dts: renesas: r8a77965: Add SDHI device nodes
Add SDHI nodes to the DT of the r8a77965 SoC.

Based on several similar patches of the R8A7796 device tree
by Simon Horman <horms+renesas@verge.net.au>.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:47:06 +02:00
Geert Uytterhoeven
1c81a633de arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and
DDR1C power rails need to be kept powered when backup mode is enabled.
Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV
PMIC node.

The accessory power switch (SW8) is a momentary switch, hense specify
"rohm,rstbmode-pulse".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:18 +02:00
Geert Uytterhoeven
d666493fd6 arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails
need to be kept powered when backup mode is enabled.  Reflect this in
the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node.

The accessory power switch (SW23) is a toggle switch, hence specify
"rohm,rstbmode-level".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:18 +02:00
Geert Uytterhoeven
786f3cc022 arm64: dts: renesas: ulcb: Add BD9571 PMIC
Add a device node for the ROHM BD9571MWV PMIC.

This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:17 +02:00
Geert Uytterhoeven
80f7297c08 arm64: dts: renesas: r8a77965: Correct whitespace
Add missing space after comma.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:16 +02:00
Geert Uytterhoeven
e4d9242a30 arm64: dts: renesas: r8a7796: Correct whitespace
Add missing spaces after commas.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:16 +02:00
Geert Uytterhoeven
399ec3ffb1 arm64: dts: renesas: r8a7795: Correct whitespace
Add missing spaces after commas.
Replace 8 consecutive spaces by a TAB.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:15 +02:00
Yoshihiro Shimoda
610fd5deb1 arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3
This patch enables USB2.0 host channel 3 for r8a7795 with Salvator-XS.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:14 +02:00
Yoshihiro Shimoda
5650011a06 arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node
This patch enables HS-USB channel3 node for r8a7795 with Salvator-XS.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:14 +02:00
Yoshihiro Shimoda
cd49f631dd arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node
This patch enables usb2_phy3 node for r8a7795 with Salvator-XS.
You must change the SW31 to OFF-OFF-ON-ON-ON-ON on the board.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:13 +02:00
Wolfram Sang
99b1eb0f62 arm64: dts: renesas: salvator-common: add eeprom
Add the EEPROM found on Salvator-X and -XS boards for H3, M3-W, and M3-N
on the IIC_DVFS bus.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:12 +02:00
Sergei Shtylyov
7a9706d25f arm64: dts: renesas: condor: add CAN-FD support
Define the Condor board dependent part of the CAN-FD device node.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:11 +02:00
Sergei Shtylyov
f38c417272 arm64: dts: renesas: r8a77980: add CAN-FD support
Define the generic R8A77980 part of the CAN-FD device node.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:11 +02:00
Sergei Shtylyov
bb8d20331f arm64: dts: renesas: eagle: add CAN-FD support
Define the Eagle board dependent part of the CAN-FD device node.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:10 +02:00
Sergei Shtylyov
81a579d53a arm64: dts: renesas: r8a77970: add CAN-FD support
Define the generic R8A77970 part of the CAN-FD device node.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:46:09 +02:00
Niklas Söderlund
4c529600ee arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
Based on previous work by Ryo Kataoka <ryo.kataoka.wt@renesas.com>.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
[simon: moved thermal node to preseve ordering of nodes by bus address]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:45:19 +02:00
Niklas Söderlund
7e26520fb4 arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
Replace the hardcoded power domain indices by R8A77965_PD_* symbols.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
[simon: dropped hunk to include r8a77965-sysc.h which is already present]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:45:19 +02:00