Commit graph

616,062 commits

Author SHA1 Message Date
Laurent Pinchart
272bde0384 arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:25 +02:00
Vladimir Barinov
e8c841f5ac arm64: dts: h3ulcb: enable GPIO leds
This supports GPIO leds on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:25 +02:00
Vladimir Barinov
2627d5179f arm64: dts: h3ulcb: Sound SSI support
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:24 +02:00
Vladimir Barinov
5709436319 arm64: dts: h3ulcb: enable SDHI0
This supports SDHI0 on H3ULCB board SD card slot

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:18 +02:00
Vladimir Barinov
0e3886a981 arm64: dts: h3ulcb: enable GPIO keys
This supports GPIO keys on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:17 +02:00
Simon Horman
56de959f53 arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.

This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.

Found by inspection.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:16 +02:00
Vladimir Barinov
15907f1f87 arm64: dts: h3ulcb: enable USB2.0 Host channel 1
This supports USB2.0 Host channel 1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:06 +02:00
Vladimir Barinov
0baa64d8d2 arm64: dts: h3ulcb: enable USB2 PHY of channel 1
This supports USB2 PHY channel #1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:28 +02:00
Vladimir Barinov
4bdb25d0f1 arm64: dts: h3ulcb: enable WDT
This supports watchdog timer for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:27 +02:00
Vladimir Barinov
b00d23f71f arm64: dts: h3ulcb: enable EXTALR clk
This enables EXTALR clock that can be used for the watchdog.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:26 +02:00
Vladimir Barinov
eb3f0f199f arm64: dts: h3ulcb: enable I2C2
This supports I2C2 bus on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:26 +02:00
Vladimir Barinov
144bf6ccb1 arm64: dts: h3ulcb: enable EthernetAVB
This supports Ethernet AVB on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:25 +02:00
Vladimir Barinov
af111bce54 arm64: dts: h3ulcb: enable SCIF clk and pins
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:24 +02:00
Vladimir Barinov
b10690d11f arm64: dts: h3ulcb: initial device tree
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.

This commit supports the following peripherals:
- SCIF (console)

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:24 +02:00
Vladimir Barinov
f1d404faed arm64: dts: h3ulcb: add H3ULCB board DT bindings
Add H3ULCB Device tree bindings Documentation, listing it as a supported
board.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:23 +02:00
Geert Uytterhoeven
f826473520 arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:23 +02:00
Laurent Pinchart
aadc4ee00a arm64: dts: r8a7795: renesas: salvator-x: Enable DU
Only the VGA output is supported for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:11 +02:00
Laurent Pinchart
a001a07fe8 arm64: dts: renesas: r8a7795: Add DU device to DT
Add the DU device to r8a7795.dtsi in a disabled state.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:10 +02:00
Laurent Pinchart
9f8573e38a arm64: dts: renesas: r8a7795: Add VSP instances
The r8a7795 has 9 VSP instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:10 +02:00
Laurent Pinchart
52cd078325 arm64: dts: renesas: r8a7795: Add FCPV nodes
The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:09 +02:00
Yoshihiro Shimoda
0b4dca78f0 arm64: dts: r8a7795: salvator-x: enable HSUSB
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:56:55 +02:00
Yoshihiro Shimoda
34ccd788a3 arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0
We have to set SW15 to pin 2-3 side on the board before we use CN9
as USB host or peripheral.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:56:45 +02:00
Yoshihiro Shimoda
a905b72ce9 arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0
This patch also adds a regulator node for USB2.0 to handle VBUS on/off
by the phy-rcar-gen3-usb2 driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:56:34 +02:00
Yoshihiro Shimoda
d2422e1088 arm64: dts: r8a7795: Add HSUSB device node
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:27 +02:00
Wolfram Sang
dcdca4d538 arm64: dts: r8a7795: set maximum frequency for SDHI clocks
Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:27 +02:00
Kieran Bingham
bfb3145934 arm64: dts: r8a7795: add FDP1 device nodes
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:26 +02:00
Kieran Bingham
28fc813153 arm64: dts: r8a7795: add FCPF device nodes
Provide nodes for the FCP devices dedicated to the FDP device channels.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:26:26 +02:00
Takeshi Kihara
374cf6992d pinctrl: sh-pfc: r8a7796: Add SDHI pins, groups and functions
This patch adds SDHI pins, groups and functions to R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-19 09:37:20 +02:00
Takeshi Kihara
fc43d8b217 pinctrl: sh-pfc: r8a7796: Add SCIF pins, groups and functions
This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A7796
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-19 09:37:17 +02:00
Takeshi Kihara
f9aece7344 pinctrl: sh-pfc: Initial R8A7796 PFC support
This patch adds initial pinctrl driver to support for the R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: rebased on top of renesas-drivers]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-19 09:37:11 +02:00
Laurent Pinchart
7955dac1b7 pinctrl: sh-pfc: r8a7795: Add DU support
Only the DU parallel RGB output signals are included, HDMI and TCON pins
will be added in separate groups.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-16 10:30:43 +02:00
Sergei Shtylyov
2b84bf8929 pinctrl: sh-pfc: r8a7792: Add DU pin groups
Add DU pin groups to the R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 14:32:03 +02:00
Sergei Shtylyov
7dd74bb1f0 pinctrl: sh-pfc: r8a7792: Add VIN pin groups
Add VIN[0-5] pin groups to the R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[geert: Fix VI1_D14_G6_Y6 and VI1_D15_G7_Y7 pins]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 14:32:03 +02:00
Geert Uytterhoeven
adc9ad09f7 pinctrl: sh-pfc: r8a7795: Correct header from R-Car Gen3 to R8A7795
This source file handles r8a7795 only, which is not the sole member of
the R-Car Gen3 family.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-08 14:30:28 +02:00
Sergei Shtylyov
37d0d275bd pinctrl: sh-pfc: r8a7792: Add CAN pin groups
Add CAN0/1 data/clock pin groups to R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:34:18 +02:00
Sergei Shtylyov
1373eeeb3e pinctrl: sh-pfc: r8a7792: Add SDHI pin groups
Add SDHI0 pin groups to the R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:33:47 +02:00
Sergei Shtylyov
2e67216c8c pinctrl: sh-pfc: r8a7792: Add EtherAVB pin groups
Add the EtherAVB pin groups to the R8A7792 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:33:46 +02:00
Sergei Shtylyov
2cf59e0c20 pinctrl: sh-pfc: Add R8A7792 PFC support
Add the PFC support for the R8A7792 SoC including pin groups for some
on-chip devices such as SCIF, INTC, and LBSC...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[geert: s/LSBC/LBSC/]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:33:38 +02:00
Sergei Shtylyov
e729bbc19e pinctrl: sh-pfc: Fix overly long lines
The PORT_GP_CFG_<n>() macros take up more than 80 columns -- and not for
a good reason. Make the header file checkpatch.pl-proof at least in this
respect...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:00:18 +02:00
Ulrich Hecht
560655247b pinctrl: sh-pfc: r8a7795: Add bias pinconf support
Implements pull-up and pull-down. On this SoC there is no simple mapping of
GP pins to bias register bits, so we need a table.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08 12:00:18 +02:00
Linus Torvalds
29b4817d40 Linux 4.8-rc1 2016-08-07 18:18:00 -07:00
Linus Torvalds
857953d72f Merge branch 'for-linus' of git://git.kernel.dk/linux-block
Pull more block fixes from Jens Axboe:
 "As mentioned in the pull the other day, a few more fixes for this
  round, all related to the bio op changes in this series.

  Two fixes, and then a cleanup, renaming bio->bi_rw to bio->bi_opf.  I
  wanted to do that change right after or right before -rc1, so that
  risk of conflict was reduced.  I just rebased the series on top of
  current master, and no new ->bi_rw usage has snuck in"

* 'for-linus' of git://git.kernel.dk/linux-block:
  block: rename bio bi_rw to bi_opf
  target: iblock_execute_sync_cache() should use bio_set_op_attrs()
  mm: make __swap_writepage() use bio_set_op_attrs()
  block/mm: make bdev_ops->rw_page() take a bool for read/write
2016-08-07 16:38:45 -07:00
Linus Torvalds
635a4ba111 Merge tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux
Pull drm zpos property support from Dave Airlie:
 "This tree was waiting on some media stuff I hadn't had time to get a
  stable branchpoint off, so I just waited until it was all in your tree
  first.

  It's been around a bit on the list and shouldn't affect anything
  outside adding the generic API and moving some ARM drivers to using
  it"

* tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux:
  drm: rcar: use generic code for managing zpos plane property
  drm/exynos: use generic code for managing zpos plane property
  drm: sti: use generic zpos for plane
  drm: add generic zpos property
2016-08-07 16:35:08 -07:00
Jens Axboe
1eff9d322a block: rename bio bi_rw to bi_opf
Since commit 63a4cc2486, bio->bi_rw contains flags in the lower
portion and the op code in the higher portions. This means that
old code that relies on manually setting bi_rw is most likely
going to be broken. Instead of letting that brokeness linger,
rename the member, to force old and out-of-tree code to break
at compile time instead of at runtime.

No intended functional changes in this commit.

Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07 14:41:02 -06:00
Jens Axboe
31c64f7876 target: iblock_execute_sync_cache() should use bio_set_op_attrs()
The original commit missed this function, it needs to mark it a
write flush.

Cc: Mike Christie <mchristi@redhat.com>
Fixes: e742fc32fc ("target: use bio op accessors")
Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07 14:41:02 -06:00
Jens Axboe
ba13e83ec3 mm: make __swap_writepage() use bio_set_op_attrs()
Cleaner than manipulating bio->bi_rw flags directly.

Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07 14:41:02 -06:00
Jens Axboe
c11f0c0b5b block/mm: make bdev_ops->rw_page() take a bool for read/write
Commit abf545484d changed it from an 'rw' flags type to the
newer ops based interface, but now we're effectively leaking
some bdev internals to the rest of the kernel. Since we only
care about whether it's a read or a write at that level, just
pass in a bool 'is_write' parameter instead.

Then we can also move op_is_write() and friends back under
CONFIG_BLOCK protection.

Reviewed-by: Mike Christie <mchristi@redhat.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07 14:41:02 -06:00
Linus Torvalds
52ddb7e9dd Three fixes for the docs build, including removing an annoying warning on
"make help" if sphinx isn't present.
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Merge tag 'doc-4.8-fixes' of git://git.lwn.net/linux

Pull documentation fixes from Jonathan Corbet:
 "Three fixes for the docs build, including removing an annoying warning
  on 'make help' if sphinx isn't present"

* tag 'doc-4.8-fixes' of git://git.lwn.net/linux:
  DocBook: use DOCBOOKS="" to ignore DocBooks instead of IGNORE_DOCBOOKS=1
  Documenation: update cgroup's document path
  Documentation/sphinx: do not warn about missing tools in 'make help'
2016-08-07 10:23:17 -04:00
Linus Torvalds
e9d488c311 binfmt_misc for-linus on 20160727
First off, the intention of this pull is to declare that I'll be the
 binfmt_misc maintainer (mainly on the grounds of you touched it last,
 it's yours).  There's no MAINTAINERS entry, but get_maintainers.pl
 will now finger me.
 
 The update itself is to allow architecture emulation containers to
 function such that the emulation binary can be housed outside the
 container itself.  The container and fs parts both have acks from
 relevant experts.
 
 The change is user visible. To use the new feature you have to add an
 F option to your binfmt_misc configuration.  However, the existing
 tools, like systemd-binfmt work with this without modification.
 
 Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
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Merge tag 'binfmt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/binfmt_misc

Pull binfmt_misc update from James Bottomley:
 "This update is to allow architecture emulation containers to function
  such that the emulation binary can be housed outside the container
  itself.  The container and fs parts both have acks from relevant
  experts.

  To use the new feature you have to add an F option to your binfmt_misc
  configuration"

From the docs:
 "The usual behaviour of binfmt_misc is to spawn the binary lazily when
  the misc format file is invoked.  However, this doesn't work very well
  in the face of mount namespaces and changeroots, so the F mode opens
  the binary as soon as the emulation is installed and uses the opened
  image to spawn the emulator, meaning it is always available once
  installed, regardless of how the environment changes"

* tag 'binfmt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/binfmt_misc:
  binfmt_misc: add F option description to documentation
  binfmt_misc: add persistent opened binary handler for containers
  fs: add filp_clone_open API
2016-08-07 10:13:14 -04:00
Eryu Guan
337684a174 fs: return EPERM on immutable inode
In most cases, EPERM is returned on immutable inode, and there're only a
few places returning EACCES. I noticed this when running LTP on
overlayfs, setxattr03 failed due to unexpected EACCES on immutable
inode.

So converting all EACCES to EPERM on immutable inode.

Acked-by: Dave Chinner <dchinner@redhat.com>
Signed-off-by: Eryu Guan <guaneryu@gmail.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-08-07 10:03:31 -04:00