Commit graph

873,075 commits

Author SHA1 Message Date
qctecmdr
2b7be99444 Merge "clk: qcom: Set BRANCH_HALT_SKIP for clocks controlled by PMU" 2019-11-01 21:32:08 -07:00
qctecmdr
7ac2a92541 Merge "clk: dt-bindings: gcc: Add PCIE AXI clocks" 2019-11-01 20:53:44 -07:00
qctecmdr
0e46785388 Merge "clk: qcom: Update gcc clk parent mappings and hw ctrl flag" 2019-11-01 20:06:43 -07:00
qctecmdr
b58a50349a Merge "msm: ipa: Retry gsi channel stop for producer channels" 2019-11-01 19:21:06 -07:00
qctecmdr
c2157915a1 Merge "msm: ipa: Disable csum offload and status for ODL pipe" 2019-11-01 18:37:35 -07:00
qctecmdr
2b33271cfb Merge "dcc_v2: Remove duplicate function" 2019-11-01 17:55:20 -07:00
qctecmdr
f15a282d80 Merge "msm:ipa: unvote PCIe clock only if it was voted before" 2019-11-01 17:08:28 -07:00
qctecmdr
cd32660da5 Merge "msm: ipa: fix race condition between USB connect and modem SSR" 2019-11-01 16:23:41 -07:00
qctecmdr
ab15b23ddd Merge "msm: gsi: Set cookie correctly for GCI channel TREs" 2019-11-01 15:38:23 -07:00
qctecmdr
db2c2903f4 Merge "msm: ipa3: Change smmu mapping logs to low priority" 2019-11-01 14:55:59 -07:00
qctecmdr
ec0f991d2f Merge "msm: ipa: Add stats for page recycling" 2019-11-01 14:06:04 -07:00
qctecmdr
f78ce2b92c Merge "arm64: defconfig: Enable gpu cc clock driver for Lahaina" 2019-11-01 12:38:59 -07:00
qctecmdr
1ad17f1d16 Merge "clk: qcom: Add gpu cc clock driver for Lahaina" 2019-11-01 11:43:54 -07:00
qctecmdr
727f8a7022 Merge "clk: dt-bindings: gcc: Add USB PIPE clocks" 2019-11-01 10:09:03 -07:00
qctecmdr
6eaa9bf7dd Merge "techpack: Fix uapi headers_install" 2019-11-01 08:40:50 -07:00
qctecmdr
76af7ae5db Merge "i2c: i2c-msm-geni: Add I2C GENI driver snapshot" 2019-11-01 07:55:53 -07:00
qctecmdr
07714cda66 Merge "dmaengine: gpi: add GPI dmaengine driver snapshot" 2019-11-01 06:58:21 -07:00
qctecmdr
8745f6ecc5 Merge "clk: qcom: clk-alpha-pll: Remove zonda pll set rate delay" 2019-11-01 05:19:13 -07:00
qctecmdr
8e4b26ff82 Merge "media: v4l2-core: Enable VIDIOC_DQBUF ioctl functionality" 2019-11-01 04:27:18 -07:00
qctecmdr
8e02afb87a Merge "clk: qcom: clk-alpha-pll: Add support for controlling zonda5lpe PLL" 2019-11-01 03:52:02 -07:00
qctecmdr
b2f9ea926a Merge "arm64: defconfig: Enable global synx driver" 2019-11-01 02:57:25 -07:00
qctecmdr
8db7ec54b8 Merge "usb: gadget: Add support for usb runtime pm APIs" 2019-10-31 22:12:21 -07:00
qctecmdr
4091569308 Merge "cnss2: Switch to new genl structure" 2019-10-31 21:28:51 -07:00
qctecmdr
c7e8b77730 Merge "usb: gadget: rndis: Add packet filter handling for hw accelerated path" 2019-10-31 20:49:49 -07:00
qctecmdr
ad5d02f552 Merge "USB: rndis: Honor dl_max_packet_size value sent by host" 2019-10-31 20:07:48 -07:00
qctecmdr
5d1673603d Merge "usb: gadget: rndis: Add new rndis parameters" 2019-10-31 19:21:32 -07:00
qctecmdr
706ab1d034 Merge "usb: gadget: Add support for rndis flow control callback" 2019-10-31 18:40:50 -07:00
qctecmdr
7b8d417d82 Merge "usb: Add support for rndis uplink aggregation" 2019-10-31 17:49:56 -07:00
qctecmdr
3df179a516 Merge "usb: dwc3-msm: Allow xo_clk to be optional" 2019-10-31 16:59:16 -07:00
qctecmdr
6ad49b177f Merge "ion: Assume in-kernel clients for prefetch and drain" 2019-10-31 16:17:38 -07:00
qctecmdr
bba34cd529 Merge "usb: dwc3-msm: Get usb power_supply from device tree" 2019-10-31 15:32:40 -07:00
qctecmdr
b49d4cf260 Merge "usb: dwc3-msm: Add usb_ep_autoconfig_by_name" 2019-10-31 14:44:59 -07:00
qctecmdr
8a9739baf5 Merge "cnss_genl: Use new structure for genl" 2019-10-31 13:49:24 -07:00
qctecmdr
8db00d553d Merge "serial: msm-geni-serial: Remove usage of wakeup_source_init API" 2019-10-31 12:58:22 -07:00
qctecmdr
d63fbd0841 Merge "drivers: pinctrl: msm: Add fwnode when setting up hireachy" 2019-10-31 12:15:33 -07:00
Vivek Aknurwar
af5a5d977a clk: qcom: Set BRANCH_HALT_SKIP for clocks controlled by PMU
Set BRANCH_HALT_SKIP for clocks controlled by PMU
Add PCIE_AXI clocks.

Change-Id: Ibbeb74918af15e026de353d60628525873c82f95
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-31 12:10:40 -07:00
Vivek Aknurwar
d25158b303 clk: dt-bindings: gcc: Add PCIE AXI clocks
Add PCIE AXI clocks.

Change-Id: Ic85306cbcfd80330c1e9123b5645cdf6af563744
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-31 12:10:40 -07:00
Vivek Aknurwar
59c10fcbfd clk: qcom: Update gcc clk parent mappings and hw ctrl flag
Update parent mappings from parent_names to parent_data as
clk_parent_data allows for more efficient clock registration.
Also update hw ctrl and safe enable flag.

Change-Id: I5cee5b650250fc7d41011a85fed923da5ea7c96c
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-31 12:10:39 -07:00
Bojun Pan
b5766bcabe msm: ipa: Add stats for page recycling
Adding stats for page recycling feature that tracks the
total number of packets replenished and tmp allocs for
coalescing and default pipes on Rx path.

Change-Id: Id92f5be4552101877c631628e71cf58e0da0f5d1
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-31 11:44:24 -07:00
Michael Adisumarta
b9ce34ea1e msm:ipa: unvote PCIe clock only if it was voted before
this fix makes sure to unvote PCIE clock only if it was voted before
from the same function.

Change-Id: Ie4060b7c54598ef7aa1b8b4a4a8f06d2067d2542
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 20:02:09 -07:00
Michael Adisumarta
3d5ac78337 msm: ipa: fix race condition between USB connect and modem SSR
This fix solves the race conditions between USB connect and
modem SSR by using mutex protection.

Change-Id: If97264a7c875f3e0c66b34b1b02e48b21c99e319
Acked-by: Jyothi J <jyothij@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 20:02:07 -07:00
Michael Adisumarta
9930b32e86 msm: gsi: Set cookie correctly for GCI channel TREs
Use the right index based on the cookie for GCI channel
TREs that are using the extra allocated buffers.

Change-Id: I19643223e4e496bf1b976b0bf73bbe3d8a1fe03a
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 20:02:04 -07:00
Michael Adisumarta
e0c7a2122f msm: ipa3: Change smmu mapping logs to low priority
Change enable cache coherent and smmu mapping of iova to pa to
low priority logging since it is called frequently and clogs up
the IPA dump.

Change-Id: Iaea74a5f0c9e10ac74523b38843851fa4d528547
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 20:01:48 -07:00
Michael Adisumarta
a5cc9ab667 msm: ipa: Disable csum offload and status for ODL pipe
Disable csum offload and status for ODL pipe for ADPLv3 for
APQ Platform.

Change-Id: Iab2a7a931eab7ab5b94c582b1559b7ae0fef00a7
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 18:51:31 -07:00
Michael Adisumarta
2b54370de1 msm: ipa: Retry gsi channel stop for producer channels
Retry gsi channel stop for IPA client producer channels along
with the consumer channels.

Change-Id: I60a3e93a1923fdad9ebc74197917c46551854822
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-10-30 18:51:13 -07:00
Vivek Aknurwar
ee3bb8c044 clk: dt-bindings: gcc: Add USB PIPE clocks
Update header file for usb pipe clock constants.

Change-Id: I459339210549e3f42c6ac0e578f6e9ffb5c5d1df
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-30 16:38:23 -07:00
Vivek Aknurwar
009694fac6 clk: qcom: clk-alpha-pll: Remove zonda pll set rate delay
Remove zonda pll set rate delay as it deemed unnecessary.

Change-Id: I0f2e564a7b979c0a11b751ca2eaf952a8b11591d
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-30 16:34:38 -07:00
Vivek Aknurwar
f1e212735a clk: qcom: clk-alpha-pll: Add support for controlling zonda5lpe PLL
Add programming sequence support for managing the zonda 5lpe
PLL.

Change-Id: I6eaef174c42ff148503d37bdbe9ebbabd7f65238
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-30 16:34:38 -07:00
Vivek Aknurwar
60a6158aa0 arm64: defconfig: Enable gpu cc clock driver for Lahaina
Enable gpu clock driver to support clocks for
gpu peripherals.

Change-Id: Ic2d6433906cfc441794903a47e1bd00cde5db310
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-30 16:07:03 -07:00
Vivek Aknurwar
6a7ed0d8df clk: qcom: Add gpu cc clock driver for Lahaina
Add peripheral gpu clock driver to support graphics
controller clocks.

Change-Id: Iceda55069f1d81700daa0272aac0b3fe4bc70f1b
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-10-30 16:06:55 -07:00