Commit graph

842,227 commits

Author SHA1 Message Date
Murali Nalajala
33ee534fd2 drivers: edac: Add Cache Error Reporting driver
This is a snapshot of cpu cache error reporting driver for Kryo
processors as of msm-4.19 commit<4a03e2c>. Convert the edac drivers
to compile as modules.

Change-Id: I494f7fbfbd7999a5b759bfd71094859116dbc337
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
2019-08-02 16:10:02 -07:00
Stepan Moskovchenko
17b3a89481 edac: Allow panic on correctable errors (CE)
Add an EDAC device flag and associated sysfs entries to
allow an EDAC driver to be configured to panic the kernel
if a correctable error is detected. Though correctable
errors (by definition) have no adverse system effects,
a panic may still be useful, since a correctable error may
be indicative of a marginal system state.

Change-Id: I98921469254aa7b999979c1c7d9186286f982a0c
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
[mnalajal@codeaurora.org: Make panic_on_ce as a feature
 to not to break the ABI compatability]
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
2019-08-02 13:32:14 -07:00
qctecmdr
31e5ae307b Merge "PM / wakeup: Add msm_show_resume_irq_mask to print off wakeup irq" 2019-08-01 13:25:29 -07:00
qctecmdr
1d3ac26f81 Merge "defconfig: Disable ZONE_DMA32 on Lahaina" 2019-08-01 11:03:06 -07:00
qctecmdr
28e2a94bcf Merge "sched: Add a check for cpu unbound deferrable timers" 2019-07-31 21:08:28 -07:00
qctecmdr
4efbace1dd Merge "defconfig: Enable panics on TLB_SYNC timeouts on Lahaina" 2019-07-31 20:32:37 -07:00
qctecmdr
a818ec0811 Merge "ARM64: Flush the caches for non panicking CPUs in case of a kernel panic" 2019-07-31 19:53:25 -07:00
qctecmdr
a69abbf482 Merge "arm64: mm: Log the process id in the rtb" 2019-07-31 19:17:23 -07:00
qctecmdr
e8d9dffb5e Merge "ARM: gic-v3: Log the IRQs in RTB before handling an IRQ" 2019-07-31 19:17:23 -07:00
qctecmdr
292a453226 Merge "ARM64: smp: Save CPU registers before IPI_CPU_STOP processing" 2019-07-31 18:47:33 -07:00
qctecmdr
349e716494 Merge "drivers: irq: Add debug information for irq type warnings" 2019-07-31 18:47:33 -07:00
qctecmdr
8e9118fc64 Merge "kernel: rcu: Panic on RCU stall" 2019-07-31 18:17:41 -07:00
qctecmdr
a522776264 Merge "arm64: msm: Add support for uncompressed kernel image" 2019-07-31 18:17:41 -07:00
qctecmdr
bcb0048ac7 Merge "ARM: arch_timer: force re-selection of the best clocksource" 2019-07-31 17:45:20 -07:00
Prasad Sodagudi
7650c440a8 sched: Add a check for cpu unbound deferrable timers
Add a check for cpu unbound deferrable timer expiry and raise
softirq for handling the expired timers so that the CPU can
process the cpu unbound deferrable times as early as possible
when a cpu tries to enter/exit idle loop.

Change-Id: Ieffa74fa22a4d25493f5590b5ac1e0d784fcbbad
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
[rishabhb@codeaurora.org: Resolved conflicts due to addition of
commit: time: tick-sched: Reorganize idle tick management code]
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 17:13:07 -07:00
Kyle Yan
85e1beff68 timer: Initialize global deferrable timer
Initialize timer_base_deferrable variables properly along with
the initialization of the per cpu timers.

Change-Id: I14599cb6ab2fcc657edc7489ee1a55535183e3db
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 17:12:22 -07:00
qctecmdr
ae2bbf5551 Merge "timer: Add a global deferrable timer" 2019-07-31 17:00:01 -07:00
Abhimanyu Kapur
fd69750caa ARM64: Flush the caches for non panicking CPUs in case of a kernel panic
In case of a kernel panic, only the panicking CPU does an entire
cache flush. This means that certain dirty cache lines in the
caches of the other CPUs may never get flushed. This gives us
improper RAM dumps. Add cache flushing for all the online CPUs.
The outer domain is not flushed since it is already being done by
the panicking CPU.

Change-Id: I03cf14f49334e45c145a17b06d0c623575b653e8
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 16:56:45 -07:00
qctecmdr
1c2b772425 Merge "Revert "arm64: kill flush_cache_all()"" 2019-07-31 16:17:20 -07:00
qctecmdr
74494f2b3f Merge "dtc: add integer overflow checks in fdt header" 2019-07-31 15:47:19 -07:00
qctecmdr
1c2c7ce026 Merge "arm64: Apply erratum 1024718 to Cortex A55 r2p0" 2019-07-31 15:47:19 -07:00
qctecmdr
5f14502975 Merge "smp: Allow booting a specific subset of CPUs" 2019-07-31 15:17:23 -07:00
qctecmdr
5e70ff9768 Merge "Revert "arm64: Remove unused daif related functions/macros"" 2019-07-31 15:17:23 -07:00
Rohit Vaswani
a0f944eb08 ARM64: smp: Save CPU registers before IPI_CPU_STOP processing
When a kernel panic occurs on one CPU, other CPUs are instructed to stop
execution via the IPI_CPU_STOP message. These other CPUs dump their stack,
which may not be good enough to reconstruct their context to perform
post-mortem analysis. Dump each CPU's context (before it started
processing the IPI) into a globally accessible structure and print them on
the dmesg/console to allow for easier post-mortem debugging.

[eberman@codeaurora.org: make regs_before_stop static]
Change-Id: Ifd7589af4327992540196c87f8b640045d7eaf19
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 14:52:38 -07:00
Atanas Filipov
c3e200ccaf arm64: msm: Add support for uncompressed kernel image
Add support for uncompressed kernel image

[eberman@codeaurora.org: Removed dtb-related changes]
[eberman@codeaurora.org: Add extra description to Kconfig]
Change-Id: I62229187e1f3e0ec11ff4b5a31c36dcee86dc8b7
Signed-off-by: Atanas Filipov <afilipov@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 14:45:17 -07:00
Se Wang (Patrick) Oh
4914b031a9 ARM: arch_timer: force re-selection of the best clocksource
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and It can be behind the real time. So make it possible to select
the best clocksource right after arm arch timer initialization, so that
jiffies can be increased by multiple counts since then.

Change-Id: Id8c4e3ce9b9e44061fef7ad7e678ca1c27d84bb1
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 14:16:43 -07:00
Se Wang (Patrick) Oh
f587015e88 clocksource: add API to force re-selection of the best clocksource
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So add API to force re-
selection of the best clocksource among registered clocksources so
that the best clocksource can be selected whenever it is available.

Change-Id: I481de3cdf1df8f0e35ed10aee7ab3882bf7a35b3
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-31 14:15:55 -07:00
Isaac J. Manjarres
27b873ce94 defconfig: Disable ZONE_DMA32 on Lahaina
Disable the DMA zone on for faster memory allocations,
and better memory utilization by merging the memory consumed
by the DMA zone with the normal memory zone.

Change-Id: If3ecf649878ad70bc6045a2c619ef99054ed469d
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-07-31 12:43:16 -07:00
Isaac J. Manjarres
b26e49222e iommu: Align QCOM_IOMMU_IO_PGTABLE_QUIRKS with other configs
The IOMMU configs should not be enabled unless we are sure
that we need to use them, so align the description for
QCOM_IOMMU_IO_PGTABLE_QUIRKS to reflect this.

Change-Id: I62893ae6f263200417f69ffdd559f9601241f9f2
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-07-31 12:43:08 -07:00
Isaac J. Manjarres
0149304dfc defconfig: Enable panics on TLB_SYNC timeouts on Lahaina
Enable the panic on TLB_SYNC timeout configuration on
Lahaina to collect the SMMU state on the first TLB_SYNC
timeout.

Change-Id: I7cb465d402cb5f39eb571666b661663e67a2c24e
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-07-31 12:43:03 -07:00
Isaac J. Manjarres
5f12e809c9 defconfig: Enable all IOMMU related configs on Lahaina
Enable all of the IOMMU related features on the Lahaina
target.

Change-Id: I4a997394d5f936f4dadd8413d29b9c8c080929dc
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-07-31 12:42:58 -07:00
Prakruthi Deepak Heragu
f7b837326b arm64: defconfig: Enable IPCC driver as a module
Enable IPCC driver as a loadable kernel module for Lahaina.

Change-Id: I186590a0d8e4206810e35d4c485f9f77a467a985
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2019-07-31 10:50:48 -07:00
qctecmdr
9fe2640572 Merge "soc: qcom: ipcc: Add snapshot of IPCC controller" 2019-07-30 20:11:24 -07:00
qctecmdr
be22176095 Merge "irqdomain: Implement and expose API to clear IRQ mapping for radix tree" 2019-07-30 19:29:09 -07:00
qctecmdr
ab1e36231e Merge "iommu/arm-smmu: Merge all IOMMU changes from msm-4.19 to msm-lahaina" 2019-07-30 18:53:17 -07:00
Channagoud Kadabi
8e647236ed kernel: rcu: Panic on RCU stall
Enable panic on RCU stalls if the RCU_PANIC_ON_STALL is enabled. This
helps collecting the cpu context for debugging.

Change-Id: Ibc95799df995bf31053152ab9b3894710fcd9f43
Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 14:07:37 -07:00
Prakruthi Deepak Heragu
524bc3b8a9 soc: qcom: ipcc: Add snapshot of IPCC controller
This is a snapshot of the IPCC controller driver as of msm-4.19 commit
<d3d6e9be4297471f88c2a14d31424c508a5b7174>. (Merge "cnss2: Add idle state
to bus voting").

Change-Id: I5b8a3b1e7f71d7cd7e59cf0271e8eac7549c5b6c
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2019-07-30 13:05:36 -07:00
Prakruthi Deepak Heragu
2fd144aa1b irqdomain: Implement and expose API to clear IRQ mapping for radix tree
The irq_domain_remove() API expects all the irqs of the domain be cleared
before it is called, else it throws a warning. A framework creating a
radix tree to map all the irqs used by its clients cannot be sure if all
the clients cleared their irqs. Thus to avoid this warning, we can use
this API irq_dispose_all_tree_mappings() to ensure that all irqs
belonging to the domain are cleared before the domain is itself removed.

Change-Id: Ied1f20c990aba9d4760091d9ed3d48c3e4f3d5d9
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2019-07-30 11:33:03 -07:00
Rishabh Bhatnagar
09d8f5f70a drivers: irq: Add debug information for irq type warnings
Add device node information that adds interrupts without specifying
IRQ type.

Change-Id: Ib475043af11bfb0dfc266a1b5c2f538d875d06d4
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 10:04:58 -07:00
Kyle Yan
489af2b126 timer: Add a global deferrable timer
Add a global deferrable timer in addition to the per-cpu deferrable timer
to allow deferrable timers without the TIMER_PINNED flag to run
on any active CPU.

[rishabhb@codeaurora.org: Resolved conflicts in kernel/time/timer.c]
Change-Id: I8e6b77cef972589912ad18f324c46c936fbbb96f
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 09:55:45 -07:00
Vijay Kumar Pendoti
ef95f6c3b1 dtc: add integer overflow checks in fdt header
Protect against integer overflows caused by malformed fdt headers.

[eberman@codeaurora.org: most of changes have been fixed in 
commit f858927fd6 ("scripts/dtc: Update to upstream version
v1.4.7-14-gc86da84d30e4"). The upstream was commit eb890c0f77dc
("libfdt: Make fdt_check_header() more thorough"))]
CRs-Fixed: 749977
Change-Id: I51d87038f520bc761b163d291b0138c513c69a33
Signed-off-by: Vijay Kumar Pendoti <vpendo@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 09:51:00 -07:00
Se Wang (Patrick) Oh
1a568c45b0 arm64: mm: Log the process id in the rtb
Store the process id in the register trace buffer.
This gives a general idea about what process was last
running when the RTB stopped.

Change-Id: Idcbd8db9eb451f2d732c935f00b6c50f9af3c592
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 09:36:51 -07:00
Channagoud Kadabi
23c2a9291f ARM: gic-v3: Log the IRQs in RTB before handling an IRQ
Gic-v3 did not log IRQs in RTB like gic-v2. Thus add the LOGK_IRQ
logbefore calling the IRQ handler like gic-v2.

eberman@codeaurora.org: resolved trivial merge conflicts.

Change-Id: I46a5951e733a05b9a7d5d6323568fa800dfb5d62
Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 09:29:18 -07:00
qctecmdr
e99d705509 Merge "arm64: Dump stack for all CPUs on SMP CPU stop" 2019-07-30 08:37:22 -07:00
Kyle Yan
f78d8b73b2 PM / wakeup: Add msm_show_resume_irq_mask to print off wakeup irq
Utilitize the msm_show_resume_irq_mask to print off the actual wakeup irq
in order to help debug.

[eberman@codeaurora.org: Squashed in "PM / wakeup: Fix error when
CONFIG_QCOM_SHOW_RESUME_IRQ not defined"]
Change-Id: I0e9e4225d1274bb20e1ed682059432a8161a5a71
Signed-off-by: Maria Yu <aiquny@codeaurora.org>
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-07-30 08:30:09 -07:00
qctecmdr
0f59cfa453 Merge "cpu-hotplug: Always use real time scheduling when hotplugging a CPU" 2019-07-30 08:06:33 -07:00
qctecmdr
c8d728f738 Merge "cpu/hotplug: Add cpuhp_latency trace event" 2019-07-30 08:06:33 -07:00
qctecmdr
d142f00cbe Merge "workqueue: fix possible livelock with concurrent mod_delayed_work()" 2019-07-30 07:29:44 -07:00
qctecmdr
c4c9f665d8 Merge "irq-chip: gic-v3: remove print message in irq driver" 2019-07-30 07:29:44 -07:00
qctecmdr
f136543ed0 Merge "printk: Make the console flush configurable in hotplug path" 2019-07-30 06:50:41 -07:00