Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXdn7eAAoJEN0jrNd/PrOhDc4P/2U04qs7hhaI94NmrWBDto2O
OKHezveursISPEFZ+FebMF5mSNwdBG0RitKm813TwoYDEKk6Dc7GV4nQHwHPVYqW
7xK2VrqU3GpEXXSgGu6dupwx/W6ID/L6gkghg01yVVwuvuNOrCDqWTv5EM++9Ydg
5SPBP2Nvc3CQr/Q71WU8uQueTmtQoQanZC8an/CBzRO2nA8HDBDaXfQ+dgkP/U8l
QfM9TJbFgbg9s+gwboL9UwnFmDtNNRDFPEYU8Ij9q+VDW4LEodErrVVO2NSwVhG4
A8KlkUO6N/pHRTjWnERHXUS/kCUM7BRoOum+KjMUdz3SO6iSuZFaKUein7R2fld4
iV+ichP+DpnkdSpPtgTcFYUeGM1QWfBij+9owloCE4k1pr08hS8eYWxReZ9rsVGN
43ZBZg/ia41RhojfNDtAK0ntXhak7t5DIiDpi9OO7pvCtU6aYxZxzFu+C9UiCcZ3
zPHDxHkCVEjbSdrbd6AhkOIbQ9BKk9pab0iya+B3JSJTFensxYkLhAbYkmDgXiPA
8+pySykkmogBJjsiKBbANlz+5c0etMnjTpd9jBzBuagKahfpZndHtCL8VlA2Blhh
d7KORcCf1PCEoqALoj0NXhi7IxF9KrbonpQcFspWV4zFSdhBkj5O8wkR10J5q4zG
4iJt7/bmYoWO/dbRTjbr
=eFoM
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.8-rc1
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
* tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM
soc/tegra: pmc: Enable XUSB partitions on boot
soc/tegra: pmc: Initialise power partitions early
soc/tegra: pmc: Add specific error messages
soc/tegra: pmc: Use whitespace more consistently
soc/tegra: pmc: Don't probe PMC if early initialisation fails
soc/tegra: pmc: Add missing of_node_put()
soc/tegra: pmc: Ensure mutex is always initialised
soc/tegra: pmc: Don't populate SoC data until register space is mapped
soc/tegra: pmc: Fix early initialisation of PMC
soc/tegra: pmc: Ensure powergate is available when powering on
soc/tegra: pmc: Initialise resets associated with a power partition
soc/tegra: pmc: Use register definitions instead of magic values
Signed-off-by: Olof Johansson <olof@lixom.net>
Adds support for the Tegra ACONNECT bus that's used to access the APE
(audio processing engine) on Tegra X1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXdoDFAAoJEN0jrNd/PrOhH1kP/0G54Hkfqnaxr8JPVSzXqrxA
KNmECwbCp73tpCX8I7X65+uTVoC1IJNH1WkpHC5Che6DDIwzTf5S1ZPbMgOihhi4
dDZD4Ew1TUFHD2z+Vqh2uLDVtM97mxtXl0V+xk/lmw77pS8O1IziZd37UlLqWK+k
6jL2nqIoKWI9RlZ+A0nbznIEXoteZXmICDYbrdPb1lh1slMcOo5VM8FalkWZOk7r
qMzTmDFyI5c3HuGQUdJ8DrEBs+6ShN82iVLvGL6nG8ZGV8Xm/uF3cu0FY7jVwKeK
ZyeTLPZdjK1FnU036STWQ4Ynr/VjljyAlXG6iFhbfZQFHiRsd5U6iCpXn27U+yv4
3wYAHYCL+69LknggFn3mJHsA2oefaVTO7ehh7GZufVv37Tr7VaeI5cqQC46N9Ttu
PTun3JsUMk5XjxGYUzFsYb/bkhqTlF0M/ujr7Wvk8Pqx2R+QBzWqdbp+tUbucIZ6
8m7t/tW6rXXt/BNwSQ2oXp3odf6CY5Fm9djtChzPNzeoJ53mzT9EnatCgB7cgKfn
y/q6OiiG93fDjefFbvl8MZhsiNieKuipJYRqSqR4TaH5lBRhH8q3YCDyBi/pubAw
pJnNp08iMrCT/IVf+lXj2G9c7Vqnlw57lsclKhfvIh7uyMHknakM6r4CimTQJSys
hYwKHfCnBSH6Sa4tIRFv
=2QTn
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.8-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
bus: NVIDIA Tegra ACONNECT support
Adds support for the Tegra ACONNECT bus that's used to access the APE
(audio processing engine) on Tegra X1.
* tag 'tegra-for-4.8-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
bus: Add support for Tegra ACONNECT
dt-bindings: bus: Add documentation for Tegra210 ACONNECT
Signed-off-by: Olof Johansson <olof@lixom.net>
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXdRvUAAoJENfPZGlqN0++qocQAJ6MApU5z9Bn+bLCCLOUeL+F
5qtRZIQoO/VQ+7sbRR7pBTTLbKs13Zeizq9CxvhGVtq/YUqzP25/RJ8mE25j1Hq1
+X3QVVOIqCnRQVDlGSq6Og7IMOvCVsNgqxWdmAwtkuiRkD75Qsb6lkmLH8MyNkRj
6UcC7UUJ5P/Pes9Qgh7ZqfWHD+A7JkUbYlN8THQkuSOJyA5Vf/jAry6riQSkJiuy
854xJ/f1FRAQas/Usqr3i+6gpZtRw66n5DA+JFubXJLxvrqnZUDdjV2d1tS8phC6
/AIGxx8n967lPg7j9DO6YxEViF3sxFrvQNds8qYoxzH6+z7FtApBJW9EDLkb58+H
nvP93DnYz1PzIjcKq0CDreqVnPDtBFK4kfDzkMxLIfbfQVgtSQlo0rpjHQzUA24u
6zk0Nhl2DM7pe9BYxQNGwWK9f9QIKxiKx9y8Qqkghylq27V34tG+dBgRj0Klv6G+
QHJNg2ShGZ/esup14eOh4YOw4ks6oNPeda0Rbl4ox3Ec970/42uIR495rsM40Avb
G17hpvsCd4oVq5xhmr8CKSDzNleewRYGxbzs5Yp1VpWxAjkKOO2AlCxaWSYtYpQe
gO1sT/YDWx4m0wiEa1/W0z3tO+U3w3wKaKOtxOZyjOj6dq99MJxPwMRoHYUGyMKW
gGN/bJjsoxBJO/Kl0om+
=/p9r
-----END PGP SIGNATURE-----
Merge tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXcaVxAAoJEFKiBbHx2RXVoxwQAMPI+3iN8M60JJ0SJvhP/VQA
AlPUcuaS2j50K16srmLif4aG8JYReRI4SNdy0J1kaRRi9OAEHiyQ5yVVlDA+FTTT
RErBxVzRUYyeCzrBpP1CL4khT+691QVx0dMcdlhnNRUttP3Cd42FM0J4GExWuDJO
UuOVn1UV0PmgSNfmYzyk87LXOA1di7ZGht02Vnjnh+kcoVjUy4Ty/yLHzxGPYcaF
RIj6lgYREtU7TN63MNkbYyx2FF+8WS9l5Q6U9E4Z/3nwRzhzhtPimWGtz1EHmxfy
a8YXmkQYM3RvPa8Cigiyg5ubkLlPC7w2rkNExKUyC/Y/jbvE4l/XJNleCEiGZmMT
f48F+7iAGgOwITL0+Lqj4VbKlUihwW28+OjcS/M5fTpDR6k0dmU0zHMhJKR9pYVU
Cr7ucYcPvzF2M6d4Frre9tZski4DZkpke81xjf6HQ00gI2CaDV/lieXtFjikL/Cl
ktdwQAo2+ydJ+7Ps5Qas2A+d66REe90vx2RCZWFRs9Nxe/CfSSz01LM6EeyONBKf
XfQvbKc6V/ZVHkWkA/EILlfRFCho6KwpEAHpZpFt1NiplJXfUcDcQyy/CuIKLR4H
c/UfKeGZCK+VyezbMWAKDb7ig3KywHD8yRieQpCyysVB/97oulJ/bHEs1KT5Bl5I
uDjnR7KqyXJEOGANr5S2
=WprH
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.8
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
* tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose PAS command 10 as reset-controller
firmware: qcom: scm: Peripheral Authentication Service
soc: qcom: Update properties for smem state referencing
soc: qcom: smp2p: Drop io-accessors
soc: qcom: smp2p: Correct addressing of outgoing value
soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components
firmware: qcom: scm: Add support for ARM64 SoCs
firmware: qcom: scm: Convert to streaming DMA APIS
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Use atomic SCM for cold boot
firmware: qcom: scm: Convert SCM to platform driver
MAINTAINERS: Add file patterns for qcom device tree bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
* Make GPMC driver non modular as it is going to
be built-in only till arch/arm/mach-omap2 users
are removed.
* Fix build if CONFIG_OF is not defined.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXcOJDAAoJENJaa9O+djCTMDYP/jurhmkQ+5AtQDkBiizbKiHD
I11YApN9hRvfZFf3rh8+dwSNswQI/ND3foCdvN6D+TPTYPlEV06hjCygxPlqN+ui
3cpBn0mG6ZKFuVkz5HIQwYdy9t+zn5HULT+JkPCkRRwFUBQys/Cm/UlkBQZQzgJC
H4f+Rk81NoKY4LMeKAXweYoYA1y4LosgBX74THAd8zRSIGeVSuXGFFFCr49W+LTd
/L4LxJxLy1UIj/8oMRMhYerCZuDIA4AftgW93pnLiqJ9Whoo9tASfw88VJw6wsle
2JA5ZdNKw6I3/FAzsXGmWqcfviZaBdIHulrIiPhWz2sAonsUToz4tBIyNGDLHMra
Z7bXf0iNIoxWXC4ClSoKfADm/Ooijti4f1+d4FbI1urhSC3RWzz/YH2KLccDetwR
YJs3jrzVH409asTtk7qmFl/rA2dgvjhW68Cp0EDPvBpJlEtQlss4kzll3+7/z/VZ
urRweA6SjaNgmpuJVbxjOE1DNzmPqglm1s6laAGQdCEC/CVwyjbF7ReUNLCRzYzD
sgx6sEDNCfckwmYw+u3QUV4oiHwTMLSvfeNh6Lnoj1HTUg9KEVUT12ji17b8zEA7
OaanLm9mHJWxt59l96xJO7LXAjF0BVatEYdxcY7ul9a87SgXdpKSM2XcRMRxImb4
21M0qhhtHui2ukg5DBcY
=8acM
-----END PGP SIGNATURE-----
Merge tag 'gpmc-omap-for-v4.8' of https://github.com/rogerq/linux into next/drivers
OMAP-GPMC: driver updates for v4.8
* Make GPMC driver non modular as it is going to
be built-in only till arch/arm/mach-omap2 users
are removed.
* Fix build if CONFIG_OF is not defined.
* tag 'gpmc-omap-for-v4.8' of https://github.com/rogerq/linux:
memory: omap-gpmc: Move gpio functions out of #ifdef CONFIG_OF
memory: omap-gpmc: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Adds support for device power state management using generic power
domains and runtime PM
2. Other minor/miscellaneous fixes to the driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXaQqwAAoJEABBurwxfuKYcL4QANeUJ+5igWpK97M64GQ44fR1
msDxt44ylTY1CiAeHnDDrC0tFSUprOmigSCxx6ve8USHX6cuSmkBatt1eltVdAo5
7/BZUGIAN8RzLpcHkNgYRu3DjOnEchq/vjSWAmfcF6HqLpInNtlaQPPh4ZC5UCSj
AJljaeBPLXkTXzN1w6sLsqBghyTwEI9aj5EQkzdpRDLlKQe7TtVbxfIbZpj4a/JH
gwvNsyfRbEBfQ46bhA4XNgkACVjAEHevCzJlbjfCQ/a2KS45Hr9D2PhieQ8uDRsP
J19dGdwuUjsVmh1esWY/7jrm5SUj4dpmrbcyQBTO2G9PJuxmuwr++LOkuBprjSQe
PFjWQ6JsL+jjVQGXNS6OWDkHPhwOOlvYYGEdOI5nqFRRcffiaFdXiowOmC8OoOxf
QTNVXHGuMQGT+bL09b79OXptDuixKoroXQcvkLe4w/hJypHVRUfB/6UMn+6mlkF8
rx2Wr62ZmrVHYLVAJFNm20+hYmCOuYeOMvhXtbwBThynWsR14nsCypE/mxmRObIf
QBlVvi8gsRnqjM8j1BTRNCEi5U5dIOy15Mca5YgUSLgtzow7TD2z4e8+MUBKEm1k
68JCS20eZ4iYG+LQsCX44Lcvj35tJxcQYmQ40wm4rTgGDM7hD5w0WunTuYdoHWHw
/U17mAATlz/xDqHyGYKH
=V2AG
-----END PGP SIGNATURE-----
Merge tag 'scpi-updates-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
SCPI updates and fixes for v4.8
1. Adds support for device power state management using generic power
domains and runtime PM
2. Other minor/miscellaneous fixes to the driver
* tag 'scpi-updates-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: scpi: add device power domain support using genpd
Documentation: add DT bindings for ARM SCPI power domains
firmware: arm_scpi: add support for device power state management
firmware: arm_scpi: make it depend on MAILBOX instead of ARM_MHU
firmware: arm_scpi: mark scpi_get_sensor_value as static
firmware: arm_scpi: remove dvfs_get packed structure
Signed-off-by: Olof Johansson <olof@lixom.net>
- Make memory drivers explicitly non-modular
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJXaXKFAAoJENiigzvaE+LCos8P/2BtF6nr8U0cuX3UBXa6qVg/
Z7pXak46eU7cE6NicdKnrwrmBtuYxObiqwfK4Gb8KrK+Nanya7NK67p6dHiRoM6W
v1gw36ne3D5OUzDbKCCec9viChiUOrHVmBjmQPtOJY+6VGdl/xxUYXeFezcOHd5V
0E3Qh9HcXiUuh3JFs/peoLNmmch0brClhA6unlVnEB6+xkEjIEohTjVO/ndoTO+3
kEVGkfLPA2Yfoh/aOEKp59sx0XkxfVEinesO7ud3euO3RxLaSN6up63KsCei6DrA
zoyGMTxZ/6I2Spwa3rkFSIUcuq7sH1/kF9+NLlyFx8Rzd7XzBP5iNGeJGekT1DUo
+zBdSDZqcT8Jm3BFpr1YSdFzpmSLA5Vaqch33XoEM9j+e+cyJsmZ0FJyPDhAFbMa
I2IU5VJrK+MjgUi5kgrYCmYYABR3Dh0jMTQuc+2GdNq/K81MZTDinGFFyP9Z6Z9e
hRpMPWAQ/PiN/pQ2tZNdOrz+xFvPEfblsLW0XOeSy5TLDUUsNDkvrDL5OIjHBX8u
HIZ3hNmAi3wr8lRH0BKdQhoMhvt08p0OV8vZVS8XaAJ83KpO13J1EFV6cQRYCiiu
+LRFBIhSHKYvANSh5I6hfP7naijtn8qKSKDgFDOJ99lIDtA4Xm+wENLbdwYzc3gX
j8WaKzG0aLed1fBv5wHc
=szfw
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.8-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers
Drivers for 4.8 #2:
- Make memory drivers explicitly non-modular
* tag 'at91-ab-4.8-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
memory: atmel-ebi: make it explicitly non-modular
memory: atmel-sdramc: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
Add a bus driver for the Tegra ACONNECT which is used to interface to
various devices within the Audio Processing Engine (APE). The purpose
of the bus driver is to register child devices that are accessed via
the ACONNECT bus and through the device parent child relationship,
ensure that the appropriate power domain and clocks are enabled for
the ACONNECT when any of the child devices are active. Hence, the
ACONNECT driver simply enables runtime-pm for the ACONNECT device
so that when a child device is resumed, it will enable the power-domain
and clocks associated with the ACONNECT.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add binding documentation for the Tegra ACONNECT bus that is part of the
Audio Processing Engine (APE) on Tegra210. The ACONNECT bus is used to
access devices within the APE subsystem. The APE is located in a
separate power domain and so accesses made to the ACONNECT require the
power domain to be enabled as well as some platform specific clocks.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PCIe host controller found on Tegra20 has a hardware bug that causes
PCIe interrupts to get lost when LP2 is enabled. Stub out the workaround
on 64-bit ARM because none of the more recent Tegra SoC generations seem
to have this bug anymore.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra XHCI driver does not currently manage the Tegra XUSB power
partitions and so it these partitions have not been enabled by the
bootloader then the system will crash when probing the XHCI device.
While proper support for managing the power partitions is being
developed to the XHCI driver for Tegra, for now power on all the XUSB
partitions for USB host and super-speed on boot if the XHCI driver is
enabled.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
If CONFIG_PM_GENERIC_DOMAINS is not enabled, then power partitions
associated with a device will not be enabled automatically by the PM
core when the device is in use. To avoid situations where a device in
a power partition is to be used but the partition is not enabled,
initialise the power partitions for Tegra early in the boot process and
if CONFIG_PM_GENERIC_DOMAINS is not enabled, then power on all
partitions defined in the device-tree blob.
Note that if CONFIG_PM_GENERIC_DOMAINS is not enabled, after the
partitions are turned on, the clocks and resets used as part of the
sequence for turning on the partition are released again as they are no
longer needed by the PMC driver. Another benefit of this is that this
avoids any issues of sharing resets between the PMC driver and other
device drivers that may wish to independently control a particular
reset.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When initialising a powergate, only a single error message is shown if
the initialisation fails. Add more error messages to give specific
details of what failed if the initialisation failed and remove the
generic failure message.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 0259f522e0 ('soc/tegra: pmc: Restore base address on probe
failure') fixes an issue where the PMC base address pointer is not
restored on probe failure. However, this fix creates another problem
where if early initialisation of the PMC driver fails and an initial
mapping for the PMC address space is not created, then when the PMC
device is probed, the PMC base address pointer will not be valid and
this will cause a crash when tegra_pmc_init() is called and attempts
to access a register.
Although the PMC address space is mapped a 2nd time during the probe
and so this could be fixed by populating the base address pointer
earlier during the probe, this adds more complexity to the code.
Moreover, the PMC probe also assumes the the soc data pointer is also
initialised when the device is probed and if not will also lead to a
crash when calling tegra_pmc_init_tsense_reset(). Given that if the
early initialisation does fail then something bad has happen, it seems
acceptable to allow the PMC device probe to fail as well. Therefore, if
the PMC base address pointer or soc data pointer are not valid when
probing the PMC device, WARN and return an error.
Fixes: 0259f522e0 ('soc/tegra: pmc: Restore base address on probe failure')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing of_node_put() in PMC early initialisation function to avoid
leaking the device nodes.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: squash in a couple more of_node_put() calls]
Signed-off-by: Thierry Reding <treding@nvidia.com>
The mutex used by the PMC driver may not be initialised if early
initialisation of the driver fails. If this does happen, then it could
be possible for callers of the public PMC functions to still attempt to
acquire the mutex. Fix this by initialising the mutex as soon as
possible to ensure it will always be initialised.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The public functions exported by the PMC driver use the presence of the
SoC data pointer to determine if the PMC device is configured and the
registers can be accessed. However, the SoC data is populated before the
PMC register space is mapped and this opens a window where the SoC data
pointer is valid but the register space has not yet been mapped which
could lead to a crash. Furthermore, if the mapping of the PMC register
space fails, then the SoC data pointer is not cleared and so would
expose a larger window where a crash could occur.
Fix this by initialising the SoC data pointer after the PMC register
space has been mapped.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
During early initialisation, the available power partitions for a given
device is configured as well as the polarity of the PMC interrupt. Both
of which should only be configured if there is a valid device node for
the PMC device. This is because the soc data used for configuring the
power partitions is only available if a device node for the PMC is found
and the code to configure the interrupt polarity uses the device node
pointer directly.
Some early device-tree images may not have this device node and so fix
this by ensuring the device node pointer is valid when configuring these
items.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_power_sequence_power_up() is a public function used
to power on a partition. When this function is called, we do not check
to see if the partition being powered up is valid/available. Fix this
by checking to see that the partition is valid/available.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When registering the Tegra power partitions with the generic PM domain
framework, the current state of the each partition is checked and used
as the default state for the partition. However, the state of each reset
associated with the partition is not initialised and so it is possible
that the state of the resets are not in the expected state. For example,
if a partition is on, then the resets should be de-asserted and if the
partition is off, the resets should be asserted.
There have been cases where the bootloader has powered on a partition
and only de-asserted some of the resets to some of the devices in the
partition. This can cause accesses to these devices to hang the system
when the kernel boots and attempts to probe these devices.
Ideally, the driver for the device should ensure the reset has been
de-asserted when probing, but the resets cannot be shared between the
PMC driver (that needs to de-assert/assert the reset when turning the
partition on or off) and another driver because we cannot ensure the
reset is in the correct state.
To ensure the resets are in the correct state, when using the generic
PM domain framework, put each reset associated with the partition in
the correct state (based upon the partition's current state) when
obtaining the resets for a partition.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Align SYSC interrupt configuration in the legacy wrapper with the DT
version:
- Mask SYSC interrupt sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
- Make sure not to clear reserved SYSCIMR bits that were set before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured
using hardcoded values in platform code. For R-Car Gen2, values are
provided for H2 and M2-W only, other SoCs are not yet supported, and
never will be.
Move this configuration from SoC-specific platform code to the
rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured
from DT. This would be the case not only for H1, H2, and M2-W using a
modern DTS, but also for other R-Car Gen2 SoCs not supported by the
platform code, relying purely on DT.
There is no longer a need to return the mapped register block, hence
make the function return void.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let rcar_sysc_init() trigger initialization of the SYSC PM domains from
DT if called before the early_initcall.
On failure, it falls back to mapping the passed register block, as
before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On success, rcar_sysc_pd_init() returns an uninitialized error code.
Use the return value of of_genpd_add_provider_onecell() to fix this.
This went unnoticed, as early_initcall() doesn't care about the return
value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PAS command 10 is used to assert and deassert the MSS reset via
TrustZone, expose this as a reset-controller to mimic the direct
access case.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the Peripheral Authentication Service (PAS) interface to the
Qualcomm SCM interface. The API is used to authenticate and boot a range
of external processors in various Qualcomm platforms.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.
Also update the #qcom,smem-state-cells for consistency, before we merge
any users of these properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SMEM is now mapped write-combine and we can use memcpy to access the
name of the entires.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The valid_entries index should not be incremented until after we have
acquired the pointer to the value, or we will read and write data one
item off.
Fixes: 50e9964141 ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Cc: stable@vger.kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
We need the signal from wcnss_ctrl indicating that the firmware is up
and running before we can communicate with the other components of the
chip. So make these other components children of the wcnss_ctrl device,
so they can be probed in order.
The process seems to take between 1/2-5 seconds, so this is done in a
worker, instead of holding up the probe.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add an implementation of the SCM interface that works on ARM64 SoCs. This
is used by things like determine if we have HDCP support or not on the
system.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This patch converts the Qualcomm SCM driver to use the streaming DMA APIs
for communication buffers. This is being done so that the
secure_flush_area call can be removed. Using the DMA APIs will also make
the SCM32 symmetric to the coming SCM64 code.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This patch moves the qcom_scm_remap_error function to the include file
where can be used by both the 32 and 64 bit versions of the code.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch changes the cold_set_boot_addr function to use atomic SCM
calls. cold_set_boot_addr required adding qcom_scm_call_atomic2 to
support the two arguments going to the smc call. Using atomic removes
the need for memory allocation and instead places all arguments in
registers.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch converts the Qualcomm SCM firmware driver into a platform
driver. It also adds clock management for firmware calls which require
clocks to be enabled during the duration of their execution. Rate
setting of the core clock is also in place for higher performance.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Submitters of device tree binding documentation may forget to CC
the subsystem maintainer if this is missing.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The use of __raw IO accesors is not endian safe and should be used
sparingly. The relaxed variants should be as lightweight and also
are endian safe.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The Kconfig currently controlling compilation of this code is:
drivers/memory/Kconfig:config ATMEL_EBI
drivers/memory/Kconfig: bool "Atmel EBI driver"
...meaning that it currently is not being built as a module by anyone.
Lets remove the few remaining modular references, so that when reading
the driver there is no doubt it is builtin-only.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Kconfig for this option is currently:
config ATMEL_SDRAMC
bool "Atmel (Multi-port DDR-)SDRAM Controller"
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity, so that when reading the
driver there is no doubt it is builtin-only.
Since module_init translates to device_initcall in the non-modular
case, the init ordering remains unchanged with this commit. An
alternate init level might be worth considering at a later date.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This patch hooks up the support for device power domain provided by
SCPI using the Linux generic power domain infrastructure.
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Jon Medhurst <tixy@linaro.org>
Reviewed-by: Jon Medhurst <tixy@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
