Commit graph

879,217 commits

Author SHA1 Message Date
qctecmdr
462ccc5bb6 Merge "rtc-pm8xxx: Clear Alarm register on resume" 2020-03-14 15:40:40 -07:00
qctecmdr
d602f36bdf Merge "arm: defconfig: Enable STM_PROTO_BASIC for lahaina" 2020-03-14 15:40:39 -07:00
qctecmdr
fbaf44464c Merge "interconnect: qcom: Ignore -EBUSY for AMC requests" 2020-03-14 15:40:39 -07:00
qctecmdr
45dde2641b Merge "msm: cvp: Restructure CVP buffer management" 2020-03-14 15:40:39 -07:00
qctecmdr
64a732e881 Merge "iommu: arm-smmu: fix check for need for preallocate memory" 2020-03-14 15:40:38 -07:00
qctecmdr
4d3d7cf067 Merge "iommu/arm-smmu: replicate faulty transaction" 2020-03-14 15:40:38 -07:00
qctecmdr
942f8d2ce6 Merge "iommu: arm-smmu: fix compile error if CONFIG_PCI disabled" 2020-03-14 15:40:37 -07:00
qctecmdr
d9c7bd08f5 Merge "msm: pcie: add proper PCIe link state for linkdown" 2020-03-14 15:40:37 -07:00
qctecmdr
e9c4f4cb2a Merge "msm: pcie: add logs for link bandwidth switching" 2020-03-14 15:40:36 -07:00
qctecmdr
be52fff03d Merge "power: supply: qti_battery_charger: add thermal mitigation support" 2020-03-14 15:40:36 -07:00
qctecmdr
517174e6d2 Merge "ion: Relax CONFIG_ION_MSM_HEAPS dependencies" 2020-03-14 15:40:36 -07:00
qctecmdr
4e9c4afc83 Merge "dwc3-msm: Increment req->num_trbs on queueing TRB" 2020-03-14 15:40:35 -07:00
qctecmdr
261a1aac81 Merge "coresight-tmc-etr : Call _tmc_disable_etr_sink when switch mode" 2020-03-14 15:40:35 -07:00
Mayank Rana
3d67a3dabe dwc3-msm: Increment req->num_trbs on queueing TRB
BAM endpoint TRB ring has usage of 2 TRBs (normal and LINK), and
completion API (dwc3_msm_req_complete_func()) currently only
increments dequeue pointer by 1 assuming that dwc3_gadget_giveback()
does increment dequeue pointer for normal TRB. With newer changes
in dwc3 gadget framework, it moves requests to cancelled list with
usb_ep_dequeue() and reclaim those TRBs on end transfer command
completion. Reclaiming TRB back to trb pool is done only when
req->num_trbs is non zero. dwc3_msm_ep_queue() API checks for
enqueue and dequeue pointers, and on mismatch of it error out.
This results into no BAM2BAM communication after trying to use USB
as sink with QDSS usecase. Fix this issue by incrementing req->num_trbs
with dwc3_msm_ep_queue() API for normal TRB so dequeue pointer is
incremented with dwc3_gadget_ep_cleanup_cancelled_requests() API.

Change-Id: I0777aea7c6add7fb6fea7ea74056786e33435427
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-03-13 16:27:21 -07:00
Mohit Aggarwal
a6a2b307a3 rtc-pm8xxx: Clear Alarm register on resume
Currently, alarm register is not cleared on resume
leading to reboot during power off charging mode.

Change-Id: Ie2e6bbab8aa46e4e9b9cc984181ffab557cbbdae
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
2020-03-13 14:32:14 +05:30
George Shen
30bb4347ec msm: cvp: Restructure CVP buffer management
It fixes an issue that CVP session creation may fail if session runs
out of buffer cache.

Change-Id: I06f2db2132c16aef51b19a9ac0c7bed917390a7b
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-03-12 23:06:54 -07:00
qctecmdr
333b4ccb21 Merge "arm64: defconfig: Enable QRTR MHI on lahaina_gki" 2020-03-12 10:52:29 -07:00
qctecmdr
4cfd7b73e5 Merge "arm64: defconfig: Enable IPC logging driver for lahaina_qgki" 2020-03-12 10:52:28 -07:00
qctecmdr
191a57173c Merge "clk: qcom: clk-debug: List regs only if respective clk is qcom-regmap clk" 2020-03-12 10:52:28 -07:00
qctecmdr
1ac679254a Merge "soc: qti_battery_debug: Add votables R/W support" 2020-03-12 10:52:28 -07:00
qctecmdr
a7e51b9ab8 Merge "usb: gadget: Stall OS descriptor request for unsupported functions" 2020-03-12 10:52:27 -07:00
Mao Jinlong
d325c5173d arm: defconfig: Enable STM_PROTO_BASIC for lahaina
Enable STM_PROTO_BASIC to support to write log to /dev/coresight-stm.

Change-Id: I12eff41b68ff1b90cc3f66a8f3c07ec757d80aae
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-03-12 02:22:07 -07:00
qctecmdr
8a8b86fb81 Merge "msm: kgsl: Do not send NMI to GMU on CM3 fault" 2020-03-12 01:49:55 -07:00
qctecmdr
65c74ef4a0 Merge "cnss2: Assert if cold boot calibration times out in debug builds" 2020-03-12 01:49:55 -07:00
qctecmdr
494d319cf9 Merge "scsi: ufs-qcom: Enable runtime auto suspend" 2020-03-11 23:39:02 -07:00
qctecmdr
7c6a00cd23 Merge "msm: kgsl: Add the CP protected registers to the A660 list" 2020-03-11 23:39:02 -07:00
qctecmdr
bf91b15b89 Merge "mm: oom_kill: Prevent debug messages from going to serial console" 2020-03-11 21:08:28 -07:00
qctecmdr
e11c0b999f Merge "arm64: defconfig: Enable SD card on Lahaina" 2020-03-11 21:08:28 -07:00
qctecmdr
f67c86403d Merge "ASoC: Update the Max value of integer controls" 2020-03-11 21:08:27 -07:00
qctecmdr
6d4cedf81e Merge "input: qcom-hv-haptics: ignore parsing non-effect subnodes" 2020-03-11 21:08:27 -07:00
qctecmdr
75d17df9a2 Merge "soc: qcom: ssr: Rename the module to 'subsystem_restart'" 2020-03-11 21:08:27 -07:00
qctecmdr
f90a64ca1b Merge "cpuidle: lpm-levels: convert PSCI return value to boolean correctly" 2020-03-11 21:08:26 -07:00
qctecmdr
106efff68e Merge "ion: don't call free_buffer_page on failure of ion_hyp_unassign_sg" 2020-03-11 21:08:26 -07:00
Vivek Aknurwar
1e2d93e144 clk: qcom: clk-debug: List regs only if respective clk is qcom-regmap clk
List register ops is provider supported hence can not be
called on clk framework clks. For example: xo-board,sleep-clk
are fixed clock.

List/print only those clocks who are qcom-regmap clks.
Cast member structure only if clk_hw is valid clk_regmap clk.

Change-Id: Id66856f45166a32e37ea7e477f80360ab020ab25
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-03-11 14:58:39 -07:00
Vivek Aknurwar
faa9650cdc clk: qcom: Maintain qcom_regmap_list of qcom clks
Providers adds ops for list rate and print reg debug nodes
to print necessary debug information, these nodes
can not be added to clk framework and is moved down to provider level.
Since provider does not have complete knowledge on clks owned
at clk framework, providers can not blindly typecast clks owned
by clk framework to call its list/print ops.
A separate qcom_regmap_list is maintained during qcom clk
registration with clk framework. So as when debug list/print
calls are called, provider have knowledge of qcom clks
and only call respective ops on qcom clks maintained
in clk_regmap_list.

Providers can use this API to know if clk is qcom regmaped clk.

Change-Id: I3e4d8280c8fa0c692f855c0d6659dd14f95008df
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-03-11 14:47:26 -07:00
Jay Jayanna
7f1979bf7b arm64: defconfig: Enable QRTR MHI on lahaina_gki
Enable the QRTR MHI transport to enable QRTR/QMI traffic to remotes
connected over MHI/PCIe.

Also, remove this feature from lahaina_debug as it will be enabled
in lahaina_gki config in this change.

Change-Id: I7e6165459c22ec105714acd575000ae1c8e39fdd
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
2020-03-11 11:45:40 -07:00
Jay Jayanna
0295cabe38 arm64: defconfig: Enable IPC logging driver for lahaina_qgki
Enable the IPC Logging driver to enable clients to write debug logs
into a circular buffer that can be read from debugfs.

Also, remove it from lahaina_debug config as it will now be
supported on lahaina_qgki.

Change-Id: I7811c15dc2572e75f3545a072b758232250afe40
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
2020-03-11 11:31:48 -07:00
Mao Jinlong
8172d1c3fd coresight-tmc-etr : Call _tmc_disable_etr_sink when switch mode
If call tmc_disable_etr_sink in switch mode function, there will be
dead lock issue as there is mem_lock in tmc_disable_etr_sink. So need
to call _tmc_disable_etr_sink.

Change-Id: I6ea242e8f519c6dea8f2b80235841bee7af1931e
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-03-11 05:00:28 -07:00
Yue Ma
8b8f86a082 cnss2: Assert if cold boot calibration times out in debug builds
In order to debug cold boot calibration timeout issues, assert when
it happens in debug builds.

Change-Id: I4ea6ade5fd660e29da2661b95fac2af02758546e
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-03-10 15:57:16 -07:00
Harshdeep Dhatt
20a71ac909 msm: kgsl: Do not send NMI to GMU on CM3 fault
Say GMU hits a hard fault and saves critical debug state and
sends CM3 fault interrupt. It is possible that subsequent handshake
between kgsl and GMU will timeout and kgsl will trigger GMU snapshot.
This will send an NMI to GMU, which will over-write the critical debug
state. To avoid this, check if there was a CM3 fault before sending
NMI to the GMU.

Change-Id: I0d4d4af3efe31110123f614c8dd8fe8d4a04c812
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-03-10 14:08:45 -06:00
Mike Tipton
d755e60728 interconnect: qcom: Ignore -EBUSY for AMC requests
AMC requests made while the RSC is in solver mode result in a -EBUSY
response from the rpmh driver. This is expected and is a non-issue since
in this case we just need the request to apply to the WAKE set instead.
It's only possible to see this for secondary RSCs like the Display RSC,
since the primary Apps RSC will only be in solver during the power
collapse/restore sequences while SW isn't running. Ignore -EBUSY so we
don't return an error and short-circuit before sending the necessary
WAKE/SLEEP requests.

Change-Id: Id34b91c6e46d282be2522434d3c2b4837291b3b7
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-03-10 11:10:03 -07:00
Can Guo
5862ee751b scsi: ufs-qcom: Enable runtime auto suspend
Enable host's runtime auto suspend capability.

Change-Id: I49240a12f08120d09efbc264261e1a19418f9668
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-03-09 23:12:58 -07:00
Sudarshan Rajagopalan
6d17c7e0e2 iommu: arm-smmu: fix check for need for preallocate memory
commit b312b4f0e2f9 ("iommu: arm-smmu: Preallocate memory for map
only on failure") had the following two errors:

  1. The return code we checking when map_sg fails and we preallocte
     is wrong. The check should be for 0 and not -ENOMEM.
     So the preallocate is never happening when map_sg fails.

  2. map_sg could've have mapped certain elements in sglist and later
     had got failed. With proper check, we are trying to call map_sg
     on the same size again, which would leave to double map of
     previously mapped elements in sglist.

Fix this by returning the actual ret code from arm_lpae_map_sg()
and check it against -ENOMEM if we need to preallocate or not.
Also, unmap any partial iovas that was mapped previously.

Change-Id: Ifee7c0bed6b9cf1c35ebb4a03d51a1a80ab0ed58
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
[isaacm@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-03-09 17:52:06 -07:00
Sudheer Papothi
5c0b877358 ASoC: Update the Max value of integer controls
When control value is queried, framework is returning the
min value as zero even if min is negative.
This change will make sure that frame work will update
the max value in cases where min is negative.

Change-Id: I4e5c70a659ded61c4094f1622611f82994df86b0
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Meng Wang <mwang@codeaurora.org>
2020-03-10 08:42:00 +08:00
Patrick Daly
76f7527146 mm: oom_kill: Prevent debug messages from going to serial console
Some devices use a watchdog driver which requires each cpu to be able to
handle an IPI within one second. Since printing to serial console disables
interrupts, the large amount of messages generated by dump_tasks() may
trigger this scenario. Therefore, ensure that these messages are
not displayed in nonfatal scenarios.

Also fix a logic error with strcmp.

Change-Id: Ifb6a09431747431478ce26ff89e38d6c6724af2d
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
[isaacm@codeaurora.org: Fixed trivial merge conflicts]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-03-09 15:50:33 -07:00
Urvashi Agrawal
e3d2adb01c msm: kgsl: Add the CP protected registers to the A660 list
Add the CP protected registers to the A660 IFPC save/restore list.

Change-Id: Ic1ac68d595f0f299a8c95875ca912b16f91f71df
Signed-off-by: Urvashi Agrawal <urvaagra@codeaurora.org>
2020-03-09 15:17:00 -07:00
Sudarshan Rajagopalan
d9a7beb3aa iommu/arm-smmu: replicate faulty transaction
With hardware having the capability, replicate the faulty transaction
using ATOS to better reflect the fault transaction type with Read/Write,
Privileged/Unprivileged and Data/Instruction access. This is done by
extending the iova_to_phys_hard to account for the transaction type.

Change-Id: Ifb3150ad78f159f04da9ba02b49851e9e119e172
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
[isaacm@codeaurora.org: resolved merge conflicts]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-03-09 13:03:27 -07:00
Qingqing Zhou
abc579fe08 iommu: arm-smmu: fix compile error if CONFIG_PCI disabled
of_get_device_group() uses pci_bus_type, compilation error will
happen if CONFIG_PCI is disabled, add checks for this config.

Fixes: 6d696b37ead1 ("iommu: arm-smmu: Support default domain attributes")
Change-Id: I7c5073b5bc5004600a4633b75fe7d5ea764cc656
Signed-off-by: Qingqing Zhou <qqzhou@codeaurora.org>
2020-03-09 12:15:10 -07:00
Harshdeep Dhatt
7636538fac msm: kgsl: Restart a6xx gpu only once
Currently, as part of fault recovery, we try to
restart the a6xx gpu five times. This loop is
for legacy reasons for a hardware condition that
existed on a4xx. That doesn’t exist for a6xx so
remove the loop. Also, if there are no need to keep
GPU active, we should transition back to SLUMBER.

Change-Id: Ib6f7437bab2b424c4f632efca459ff8c3fd064e4
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-03-09 13:11:03 -06:00
Harshdeep Dhatt
adf19f375b msm: kgsl: Correctly handle oob and fenced write failures
These both happen when gx is collapsed so its safe to
assume that nothing is inflight. Take an inline snapshot
and then request for a dispatcher based recovery.

Change-Id: I4a3438660953d38406dd8e70868fb38172f9e967
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-03-09 13:11:03 -06:00