Commit graph

875,479 commits

Author SHA1 Message Date
Viresh Kumar
55efbbcc5f hrtimer: make sure PINNED flag is cleared after removing hrtimer
Change-Id: I1a3211bc0d5d310c7fa7b92dc44ec6c4722dd7b9
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[forward port to 3.18]
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>
Git-commit: d6c894e515b4cd93c3a08e7c60cce0aa5118c656
Git-repo: git://git.linaro.org/people/mike.holmes/santosh.shukla/lng-isol.git
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-04 16:27:52 -08:00
Viresh Kumar
a13bd9b940 hrtimer: create hrtimer_quiesce_cpu() to isolate CPU from hrtimers
To isolate CPUs (isolate from hrtimers) from sysfs using cpusets, we need some
support from the hrtimer core. i.e. A routine hrtimer_quiesce_cpu() which would
migrate away all the unpinned hrtimers, but shouldn't touch the pinned ones.

This patch creates this routine.

Change-Id: Icf93622bdeed9c6c28eb1aca1637bc5b9522a533
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[forward port to 3.18]
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>
[ohaugan@codeaurora.org: Port to 4.4]
Git-commit: d4d50a0ddc35e58ee95137ba4d14e74fea8b682f
Git-repo: git://git.linaro.org/people/mike.holmes/santosh.shukla/lng-isol.git
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
[rameezmustafa@codeaurora.org: Port to msm-4.9]
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
[satyap@codeaurora.org: Port to msm-4.19 and fix merge conflicts]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-04 16:27:52 -08:00
Viresh Kumar
e2e45baa03 hrtimer: update timer->state with 'pinned' information
'Pinned' information would be required in migrate_hrtimers() now, as we can
migrate non-pinned timers away without a hotplug (i.e. with cpuset.quiesce). And
so we may need to identify pinned timers now, as we can't migrate them.

This patch reuses the timer->state variable for setting this flag as there were
enough number of free bits available in this variable. And there is no point
increasing size of this struct by adding another field.

Change-Id: Id2cdd74903598e31fab6999c4cbab9c2fd17fe23
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[forward port to 3.18]
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>
[ohaugan@codeaurora.org: Port to 4.4]
Git-commit: 62feaf1ed0b64c04868d143d8bdb92d60dc3189b
Git-repo: git://git.linaro.org/people/mike.holmes/santosh.shukla/lng-isol.git
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
[markivx: Port to 4.14, fix merge conflicts due to lack of timer stats code]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[satyap@codeaurora.org: Port to 4.19, fix merge conflicts]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-04 16:27:51 -08:00
Viresh Kumar
d205b84171 timer: create timer_quiesce_cpu() to isolate CPU from timers
To isolate CPUs (isolate from timers) from sysfs using cpusets, we need some
support from the timer core. i.e. A routine timer_quiesce_cpu() which would
migrates away all the unpinned timers, but shouldn't touch the pinned ones.

This patch creates this routine.

Change-Id: I4795aeffd1be41830ac295a1e2e8f36fb05e98b7
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[forward port to 3.18]
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>
[ohaugan@codeaurora.org: Port to 4.4. Fixes for compilation error]
Git-commit: 313910b70ea0c73f8789d9189c11e1f339080646
Git-repo: git://git.linaro.org/people/mike.holmes/santosh.shukla/lng-isol.git
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
[rameezmustafa@codeaurora.org: Port to msm-4.9 and rebase to change
					patch dependency order.]
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
[markivx: Port to 4.14, fix merge conflicts]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[satyap@codeaurora.org: Port to 4.19 and resolve trivial merge conflicts]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-04 16:27:51 -08:00
qctecmdr
f41050307f Merge "firmware: qcom-scm: Fix formatting errors in the trace string" 2019-12-04 14:57:36 -08:00
qctecmdr
f7ef9d9893 Merge "msm: ipa: Add PIL driver as soft dependency for IPA" 2019-12-04 02:35:00 -08:00
qctecmdr
d4cf41dc2e Merge "media: v4l2-core: guard code against ABI breakage" 2019-12-04 02:34:59 -08:00
qctecmdr
5f14f07b0b Merge "defconfig: enable fastrpc driver on Lahaina" 2019-12-04 01:54:28 -08:00
qctecmdr
bf2389a109 Merge "clk: qcom: add clk rpmh support for Lahaina" 2019-12-04 01:22:17 -08:00
qctecmdr
4d3767fbbb Merge "msm: cvp: Disabe sys cache and dsp initialization" 2019-12-04 01:22:15 -08:00
qctecmdr
de44503b2e Merge "mm: cma: Reduce dmesg spam" 2019-12-04 00:47:31 -08:00
qctecmdr
f07284b38a Merge "mm: cma: restrict base_pfn exposure" 2019-12-04 00:47:30 -08:00
qctecmdr
99049a00e4 Merge "soc: qcom: Add spss transport for Glink Probe driver" 2019-12-04 00:06:54 -08:00
qctecmdr
106819260e Merge "arm64: defconfig: Enable GLINK Packet driver for Lahaina" 2019-12-04 00:06:53 -08:00
qctecmdr
2f61ee8554 Merge "checkpatch: check symlinks while searching compatible strings" 2019-12-04 00:06:52 -08:00
Edgar Flores
f745eaca11 defconfig: enable fastrpc driver on Lahaina
Enable compilation of the fastrpc driver on Lahaina, which
provides a communication mechanism that allows clients to
make remote method invocations across processor boundary
to applications, compute and sensors DSP processors.

Change-Id: I2a43104e260b3e129e3447840f3180843c10ce3a
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
2019-12-03 22:14:29 -08:00
himta ram
b6f9c071a2 media: v4l2-core: guard code against ABI breakage
Guard the code against ABI breakage using IS_ENABLED Helper macro.
Guarded code will be compiled when config is set to m or y.

CRs-Fixed: 2579332
Change-Id: Ic1a5ab22c8ced2c7b527bf5086c2c7b14fe24919
Signed-off-by: himta ram <hram@codeaurora.org>
2019-12-03 21:41:18 -08:00
George Shen
b12de3763b msm: cvp: Disabe sys cache and dsp initialization
System cache and DSP CVP driver not ready for Lahaina
bring up. Disable them until they are ready.

Change-Id: I70acfe8d53e527f7456084d72d93116a047f919a
Signed-off-by: George Shen <sqiao@codeaurora.org>
2019-12-03 18:16:39 -08:00
qctecmdr
3da863f0f8 Merge "ABI: aarch64: Update ABI snapshot based on v5.4" 2019-12-03 18:00:47 -08:00
qctecmdr
f8008953da Merge "dt-bindings: sound: Add GPR device tree bindings" 2019-12-03 18:00:47 -08:00
Murali Nalajala
4b52ed4ea1 checkpatch: check symlinks while searching compatible strings
"grep -r" option excludes symlinks. This breaks if there are symlinks
present in the bindings and actual source resides outside of the kernel.
To consider symlinks invoke grep with "-R" option.

Change-Id: Ie43876a0caee8f7f5a217391213cbb12efd52ff9
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2019-12-03 17:09:16 -08:00
qctecmdr
aed6dbfc5b Merge "arm64: defconfig: Enable IPC IRQ bridge for Lahaina" 2019-12-03 16:27:01 -08:00
qctecmdr
f6ddaecb4f Merge "ion: msm: Move msm_ion probe to subsys_initcall_sync" 2019-12-03 16:27:00 -08:00
qctecmdr
9745a9b4af Merge "clk: qcom: dispcc: Fix stuck on warning for disp_cc_mdss_mdp_lut_clk" 2019-12-03 16:27:00 -08:00
qctecmdr
1e0cee8ff8 Merge "clk: qcom: dispcc: Voltage voting support for Lahaina" 2019-12-03 16:26:59 -08:00
qctecmdr
1768daa512 Merge "msm: ipa3: Fix to hold the clock until replenish the descriptors" 2019-12-03 15:33:49 -08:00
qctecmdr
5939f51cb4 Merge "msm: ipa3: Fix to increase timeout value for send command" 2019-12-03 15:33:49 -08:00
qctecmdr
0100b2ce16 Merge "mm: usercopy: skip stack page span check" 2019-12-03 15:33:49 -08:00
qctecmdr
eac37ae56c Merge "soc: qcom: secure_buffer: Move to subsys_initcall" 2019-12-03 15:33:48 -08:00
qctecmdr
acfac220ec Merge "arm64: defconfig: Enable the MSM ION heaps on Lahaina GKI" 2019-12-03 15:33:48 -08:00
Patrick Daly
9848b4d838 mm: cma: Reduce dmesg spam
CONFIG_CMA_DEBUG was #defining DEBUG, which has the side effect of
changing the behavior of pr_debug statements to always print into
the dmesg log, as opposed to printing only if they are enabled via
dynamic debug.

Log etiquette indicates that messages should only be printed for
error conditions.

Change-Id: I5eebc1060618a3abc87a7f85ae770505c991c017
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-03 14:01:37 -08:00
Prakash Gupta
01151d5fcf mm: cma: restrict base_pfn exposure
We are exposing cma region's base_pfn without any restriction. Make this
dependent on kptr_restrict configuration.

Change-Id: If454194cc5e7639f33b2e1dd29f5d925a17340c1
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-03 13:55:10 -08:00
David Dai
c957e677cf clk: qcom: add clk rpmh support for Lahaina
Add clock rpmh data to communicate with RPMH clocks for Lahaina.

Change-Id: I1291fbd77bd5412036023c3cad82f49d1ad3f0e5
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-03 13:51:59 -08:00
David Dai
5fb81a39ca dt-bindings: clock: Add rpmh header for Lahaina
Add new RPMH clocks for Lahaina.

Change-Id: Ie599365550887854a18549416ebb875135caab96
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-03 13:50:49 -08:00
Vignesh Kulothungan
1957106371 dt-bindings: sound: Add GPR device tree bindings
Add definitions for GPR domain id's and ADSP service
id's in device tree bindings.

Change-Id: I1d7d81893643287c5720a339b1eedbb6be92b4c4
Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
2019-12-03 13:35:45 -08:00
Jordan Crouse
ae4a818923 firmware: qcom-scm: Fix formatting errors in the trace string
Fix a handful of format errors in the trace string. Use a %llx for
u64 values.

Fixes: 873f25f ("firmware: qcom_scm: Add trace points to scm driver")
Change-Id: Ic0dedbad69ffdb044e094bfcb4e95f848338edd0
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2019-12-03 13:47:24 -07:00
Ghanim Fodi
2fe74a2fa4 msm: ipa: Add PIL driver as soft dependency for IPA
IPA driver uses PIL driver to load IPA firmware.
PIL driver need to be loaded before IPA driver for
GKI configuration.

Change-Id: Ib910bb7429bc739a95e47973332578806c5e5ca4
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2019-12-03 08:49:48 -08:00
Ashok Vuyyuru
5dfa9644c3 msm: ipa3: Fix to hold the clock until replenish the descriptors
When CPU load is high IPA buffer replenish WQ scheduling got delayed
because of that not able to replenish the descriptors. Add changes to
hold the clock until replenish the minimum number of descriptors.

Change-Id: Iea79dcaa90d12fc4324522ba2c63dfcdfded2f90
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2019-12-03 04:19:16 -08:00
Ashok Vuyyuru
fbec6ce31d msm: ipa3: Fix to increase timeout value for send command
Due to freeing the command payload Observing proc error
from IPA HW when HW delayed to process the command. Add
changes to increase timeout value and handling return
value from timeout function.

Change-Id: I0c953a9cc299ffdf1bd8c746a2b60a2107e993ee
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2019-12-03 04:17:26 -08:00
Mike Tipton
ff80a9c821 clk: qcom: dispcc: Fix stuck on warning for disp_cc_mdss_mdp_lut_clk
Fix the "status stuck at on" warning when disabling
disp_cc_mdss_mdp_lut_clk. The enable bit for this clock doesn't actually
do anything and instead the enable signal is tied to the enable bit of
disp_cc_mdss_mdp_clk. Even though this clock isn't truly votable, use
BRANCH_HALT_VOTED to ensure that the client enables disp_cc_mdss_mdp_clk
before this one and that we don't throw a warning on the disable path
when the clock doesn't actually turn off yet.

Change-Id: Iac4a5f5480faaa0c182202c03bbf29c5cabcb7e6
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2019-12-02 19:30:21 -08:00
Vinayak Menon
dd282b2588 mm: usercopy: skip stack page span check
Kernel stack pages can span multiple pages and GFP_COMP is not
set for stack pages. Fix the false "spans multiple pages" error.

Change-Id: I2ba414be466b7c90fb4a3542237da809175e0590
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
[swatsrid@codeaurora.org: Fix trivial merge conflicts]
Signed-off-by: Swathi Sridhar <swatsrid@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-02 15:36:05 -08:00
qctecmdr
915d2b2efe Merge "defconfig: lahaina-gki: enable the fixed regulator driver" 2019-12-02 14:28:22 -08:00
qctecmdr
29300c2af3 Merge "clk: qcom: clk-dummy: convert into a platform driver" 2019-12-02 14:28:22 -08:00
qctecmdr
e8c591025a Merge "msm: ipa3: Fix to avoid buffer overread" 2019-12-02 13:54:14 -08:00
qctecmdr
bf271291a1 Merge "msm: adsprpc: Making adsprpc gki compliant" 2019-12-02 13:54:14 -08:00
qctecmdr
ebaf0ef66a Merge "serial: msm_geni_serial: Ensure to set clock freq correctly" 2019-12-02 13:54:14 -08:00
Isaac J. Manjarres
06e7a3c825 arm64: defconfig: Enable the MSM ION heaps on Lahaina GKI
Enable the MSM ION heaps for use on Lahaina GKI.

Change-Id: I9cc92a161ae12e3eb98bfe86f7d7e5613ac4c490
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-02 13:11:00 -08:00
Isaac J. Manjarres
05e167629f arm64: defconfig: Enable secure buffer driver on Lahaina GKI
Enable the secure buffer driver on Lahaina GKI to protect memory
buffers from unauthorized accesses.

Change-Id: I1667d9490f82dc1e84c0673989d72e090b1b7583
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-02 13:10:59 -08:00
Michael Adisumarta
26958d2dfc msm: ipa3: Fix to avoid buffer overread
additional check to make sure there is no buffer overread.

Change-Id: I9bf66522f6a3da7c7185f387567d6773ae402b76
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-12-02 00:11:25 -08:00
Prudhvi Yarlagadda
acf863100d serial: msm_geni_serial: Ensure to set clock freq correctly
This patch enables UART clock to run at half the rate and make
sure write to register gets executed with read back of the same
regiter.

Change-Id: Ic4087f6e246b112769335e883a35d8eb00412907
Signed-off-by: Prudhvi Yarlagadda <pyarlaga@codeaurora.org>
2019-12-02 12:20:54 +05:30