This function is used by the Lahaina VIDEO_CC clock driver, so export it
to allow that driver to be compiled as a module.
Change-Id: Id9f5a4d3b63d3a6b47227a13386aea28a7b21380
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Enable gcc clock driver to support global clock for peripherals.
Change-Id: I400d5a556ed905150f3958c7698d05663a2337c9
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
Override halt check gcc clocks with BRANCH_HALT_VOTED as
these clks can be turned on from boot and adding votes will not
let gcc clk driver fail with status stuck on.
Change-Id: I62d78ff4ea384f4871385f77b2fde19c4c92c775
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
Enable the rpmh-regulator driver so that consumers can manage
PMIC regulator states via RPMh.
Change-Id: Ia5ee73dc04d9fcbd6412d49fd82172ff7d006a47
Signed-off-by: David Collins <collinsd@codeaurora.org>
This snapshot is taken as of msm-4.19 'commit <d2f41beab007i>
("Merge "msm: npu: Add bandwidth monitor support"")'.
This change brings the rpmsg and rpmsg glink drivers up to date with
the fixes from msm-4.19. In addition, change the copyrights to SPDX format.
Also, irq_set_affinity and sched_setaffinity can not be used when compiling
a driver as a module. Hence, moving to module-friendly APIs.
Change-Id: Id8c0bd13535c91cbecb11445bf798be44083abb6
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
A new application level feature has NAT running out of SRAM, DDR, or
both. The addtion of just this feature's header to the kernel will
allow it to be propagated to older kernels, such that they can be
compatible (in terms of structure size) with the new application level
feature.
Change-Id: I16b5bfaa1156c69e0a6ae0c2ca4be416a283d049
CRs-Fixed: 2437567
Signed-off-by: Perry Randise <prandise@codeaurora.org>
In addition to logging using FTRACE. let's also log in the IPC logging
for all RPMH transactions.
Change-Id: I2b19006bbc776053f63eee55b447428fdb023ba4
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
To debug issues when TCS is busy, report interrupt status as well. If
the interrupt line is pending at GIC, then Linux was too busy to process
the interrupt and if not pending then AOSS was too busy to handle the
request.
Change-Id: I8fd8289c74a8e1d6c771b77c2800a52f18c3a0b2
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
During flush of current cached data, Sleep and Wake TCSes have
previously programmed data present. Due to this incorrect data
is sent.
Fix this by cleaning TCSes and freshly program current cached
sleep and wake data.
Change-Id: I8f1cb9925a7800aad65d665192d3b129c76dd9de
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Sleep driver needs to program the absolute clock value for next expiry
into pdc register for system wake up. Add an API to read the cval low
and high counters.
Change-Id: I3f08b3320ea281894d46f3c4bb0862784cc337a1
Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Changes to add wake up handle for coalescing pipe.
Change-Id: I0cfc38c91a6a5b93211933f0af87640cbec8a4bf
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Add support for page table dump for test domain.
eg:
cd /d/iommu/tests/soc:apps_iommu_test_device
echo 1 > attach
echo 0x20000,0x80000000,0x10000,0x1 > map
echo 0x21000,0x1000 > unmap
echo 0x24000,0x1000 > unmap
cat iommu_page_tables
---[ start ]---
0x0000000000020000-0x0000000000021000 4K PTE USR ro x AF NG DEVICE/nGnRnE
0x0000000000022000-0x0000000000024000 8K PTE USR ro x AF NG DEVICE/nGnRnE
0x0000000000025000-0x0000000000030000 44K PTE USR ro x AF NG DEVICE/nGnRnE
Change-Id: I56ac2615c4aa30dd75a2cdc1cf46de042e681cdc
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
[isaacm@codeaurora.org: Explicitly set final entry in the markers array]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Support for coherent and non-coherent atomic allocations
in fastmap.
Change-Id: I3628508a4b2af5aa82d56a4a6a6ee4cef98cd47f
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
[isaacm@codeaurora.org: Leverage atomic DMA pool framework code]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Enable a check to see if devices with reserved memory regions allocate from
those regions, when using the DMA API for allocations. WARN_ON if check
doesn't pass.
Change-Id: Ic788dc4638d83cdf8a1e34f60efe678b9639d4b3
Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
Inside of dma_alloc_attrs(), verify that devices with a reserved memory
region are actually using the region, in order to prevent wastage of
memory.
Change-Id: I56852a761d3253ec2a3a7db0f6501c73983e55c6
Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
Add version check for FnR stats ioctl and error return,
since only IPA4.5+ HW will support this feature.
Change-Id: If5c5021d16bc1ee6af516d9e2200c3e6b5081d27
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
Add uc event ring to have ipa-uc monitor the
quota and bw-voting threshold to generate the
irq to ipa-driver to inform if quota or and bw
threshold is hit.
Change-Id: I7ce9c1a0048016fc6b6248a1632365f51717422c
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
The arm_smmu_power_off_atomic() function derives the pointer to
the SMMU device by incorrectly assuming that all devices in the
power resources structures store that pointer as part of their
driver data.
While this is true for devices that represent an SMMU, this is
not the case for the devices that represent the TBUs, as they
store the TBU structures instead of a pointer to the SMMU device.
Thus, require the SMMU device as a parameter to the
arm_smmu_power_off[_atomic] functions so that it can be used
correctly.
Change-Id: I0101500468afe17456bd6178082850e5fa6590d7
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
