Commit graph

889,574 commits

Author SHA1 Message Date
qctecmdr
1088a025d9 Merge "clk: qcom: gpucc-lahaina: Fix gpu_cc_cx_gmu_clk stuck off warning" 2020-07-14 04:57:31 -07:00
qctecmdr
d91cfbaf24 Merge "tmc-etr: Call usb_qdss_open after all etr settings are done" 2020-07-14 04:57:31 -07:00
qctecmdr
0c1f865571 Merge "power: supply: qti_battery_charger: Enable Ship mode shutdown" 2020-07-14 04:57:30 -07:00
qctecmdr
b271780bfd Merge "f2fs: fix use-after-free when accessing bio->bi_crypt_context" 2020-07-14 04:57:30 -07:00
qctecmdr
327630a533 Merge "sound: usb: Use IOMMU_CACHE mapping if USB controller is dma-coherent" 2020-07-14 04:57:30 -07:00
qctecmdr
75d3651842 Merge "msm:ipa3: removed duplicate entries in defconfig" 2020-07-14 04:57:29 -07:00
Veerabhadrarao Badiganti
60ba92dddf mmc: sdhci-msm: Remove unneeded device tree entries
Remove unnecessary device tree properties from the code.

Change-Id: Id6f59c6874acda03c3f2aa93626eb20a9dc2ac00
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-07-14 16:07:58 +05:30
Jun Li
1367cac7df mmc: core: Add at least 3 mclk cycle delay before next command after ACMD41
As per design, internal CRC error flag will be cleared only after 3 MCLK
once clear command issued. Since the MCLK will be running at 400KHz during
initialization, it will take max of 7.5us (2.5us *3 = 7.5us) to clear
the status. If the CMD_CRC_CHECK_EN bit is enabled before the source is
cleared, CRC INTR bit will be set in the 17th bit of INTR status register.
Because the response of ACMD41 in sd and CMD1 in mmc are R3 response that
don't have CRC field, so it is expected to give next command after at least
3 MCLK periods.

Change-Id: I31b52a767f2212d33cab15251ab5b37a04b25618
Signed-off-by: Jun Li <liju@codeaurora.org>
2020-07-14 17:28:13 +08:00
qctecmdr
ba6dd9aa87 Merge "cnss2: set rddm support boolean for MHI" 2020-07-14 02:04:24 -07:00
qctecmdr
ff34294560 Merge "defconfig: Enable USB related config flags on sdxlemur" 2020-07-14 02:04:24 -07:00
qctecmdr
59912b8be9 Merge "defconfig: Enable CPUFREQ HW module for cpu scaling" 2020-07-14 02:04:23 -07:00
qctecmdr
18f67937ca Merge "mhi: core: Use high priority workqueue for all MHI work" 2020-07-14 02:04:23 -07:00
qctecmdr
e9f0121b67 Merge "input: qcom-hv-haptics: clear HW faults before enabling play" 2020-07-14 02:04:22 -07:00
Veerabhadrarao Badiganti
99d7f96ca7 mmc: sdhci-msm: Update DDR_CONFIG reg with HSR value if supplied
Update DDR_CONFIG register with HSR value if HSR value is supplied
in the device tree.

Change-Id: Iffabe98ae2fe2bcc74926a7527efa7fa38bedd11
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-07-14 01:36:30 -07:00
Ritesh Harjani
dfc165dfbd UPSTREAM: mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
SDHC core with new 14lpp and later tech DLL should not enable
PWRSAVE_DLL since such controller's internal gating cannot meet
following MCLK requirement:
When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
must be switched on for at-least 1us before DATA starts coming.

Adding support for this requirement.

Change-Id: I0a00ea4deb9d043db501d781860361fcac52a58a
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1581077075-26011-1-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-07-14 01:35:35 -07:00
Isaac J. Manjarres
e6d600f8a8 drivers/base/memory.c: Optimize allocated_bytes_show()
The allocated_bytes_show() function currently iterates through
all of the free pages in the movable zone to calculate the amount
of free space in a single block. This is not efficient, as it ends
up making it so that pages that don't belong in a block get inspected.
Thus, inspect only pages that belong to a particular block when
calculating the amount of memory used in the block.

Change-Id: Ib641718e47a289e6594bf8e04e48eb4404dda1ba
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-07-14 01:09:38 -07:00
chenx
941a443f34 input: touchscreen: synaptics_tcm: add new touch driver
This is the reference driver source code for Synaptics touch.

Change-Id: I6ad3cd7d3b4d1f0f38d788cdbebc1bbcd6500c93
Signed-off-by: chenx <chenxiang0527@thundersoft.com>
Git-commit: 9397899342e9aed76898cd7f1377a798d8ae3243
Git-repo: https://source.codeaurora.org/external/thundersoft/ihvjointlab/sensor-driver/log/?h=Synaptics_tcm_v1.3
Signed-off-by: Fei Mao <feim1@codeaurora.org>
2020-07-14 00:25:17 -07:00
qctecmdr
09c5e37d74 Merge "drivers: pinctrl: Add gpio to mpm mapping for holi" 2020-07-13 22:34:39 -07:00
qctecmdr
c74230b2f8 Merge "soc: qcom: add VTCM debug test support" 2020-07-13 22:34:39 -07:00
qctecmdr
4575c8b1b9 Merge "mhi: core: Move to error state as soon as RDDM is detected" 2020-07-13 22:34:38 -07:00
qctecmdr
b71e7e2a4e Merge "usb: f_qdss: Fix race between qdss_alloc_req & qdss_close" 2020-07-13 22:34:37 -07:00
qctecmdr
096ce85950 Merge "usb: f_qdss: Setting channel to NULL in qdss_close" 2020-07-13 22:34:37 -07:00
Jack Pham
1071143571 sound: usb: Use IOMMU_CACHE mapping if USB controller is dma-coherent
If IO coherency for the USB controller is enabled, the shared buffers
need to be remapped with the cached attribute set so that the
controller HW can properly access the memory coherently. Otherwise,
the HW could end up reading stale data from cache.

While at it, remove the dma_sync_* calls, as they were previously
added with the misunderstanding that the APPS needs to force an
invalidation before passing it to the ADSP. This is not required
as long as the coherency settings are matched as there is no need
to manually perform cache maintenance when handing off the buffers.

Change-Id: I3a7ecbd7b7f1c264c64e9f5f82c9d4ec27848dc0
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-07-13 18:00:10 -07:00
Fenglin Wu
1625d8d142 input: qcom-hv-haptics: set effect to NULL in constant playing
In constant waveform playing, there is no need to use an effect data
structure to capture the current playing effect, hence set it to NULL.
This also helps the set_gain() callback to use the correct Vmax when
it's called in constant playing case. Also add a debug message to show
the Vmax setting.

Change-Id: I763ec7407b8696300dbe93f5e6935900544e75a8
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-07-14 07:22:51 +08:00
Harshdeep Dhatt
1a62cff8a9 msm: kgsl: Update preemption keepalive on a660
A660 has a new dedicated register to assert preemption
keepalive.

Change-Id: I776fc18405b6c9b827430373adcfe8582257343a
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Signed-off-by: Nitheesh Muthuraj <nmuthuraj@codeaurora.org>
2020-07-13 15:45:35 -07:00
Shaleen Agrawal
01811812f1 soc: qcom: hyp_core_ctl: Fix conditional statement boundries
Ensure conditional uses entire computation.

Change-Id: If508adcdb6d53bba0da7fb979ea4b530686b223a
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2020-07-13 15:42:28 -07:00
Elson Roy Serrao
4688452232 defconfig: Enable USB related config flags on sdxlemur
This change enables the controller driver, phy and function
drivers on sdxlemur.

Change-Id: Ief79a286ee4a624b32c0e4fc2aff5c091657c54c
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2020-07-13 12:31:07 -07:00
Todd Kjos
cfed4cb19a ANDROID: GKI: set CONFIG_STATIC_USERMODEHELPER_PATH
The android.security.cts.KernelConfigTest#testConfigDisableUsermodehelper
test is failing because CONFIG_STATIC_USERMODEHELPER_PATH is set to
an invalid value ("/sbin/usermode-helper") for the test. Setting to ""
instead.

Bug: 160949257
Signed-off-by: Todd Kjos <tkjos@google.com>
Change-Id: I1d9f003c15a6b1d9a7f47804e50661a44a0725d5
2020-07-13 18:33:24 +00:00
Elliot Berman
cd358f0f64 build.config.aarch64: s/COMPAT/ARM32
Use LINUX_GCC_CROSS_COMPILE_ARM32_PREBUILTS_BIN instead of
LINUX_GCC_CROSS_COMPILE_COMPAT_PREBUILTS_BIN since that is
backwards-compatible with older kernel/build revisions.

Change-Id: I10b60db33ffdde3d8147b983121367e5ec6566db
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-07-13 10:53:22 -07:00
Udipto Goswami
b7e68b67a0 usb: f_qdss: Fix race between qdss_alloc_req & qdss_close
While performing very fast etr enable/disable from coresight
there is a chance that when alloc_req is trying to allocate
the request qdss_close got called due to etr disable
invoking it, and before alloc_req could complete it's
execution driver is trying to free the request. This leads
to poison error.

Fix this by securing alloc_req under spinlock to avoid this
scenario. qdss_close is already under spinlock protection.

Change-Id: Ia2c629911c9044536a1eca5d72b6f6b3a91ef806
Signed-off-by: Udipto Goswami <ugoswami@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-07-13 10:28:03 -07:00
qctecmdr
613aaf12ff Merge "kernel_headers: Disable headers matching" 2020-07-13 10:22:23 -07:00
Sivakanth vaka
b059223ab7 msm:ipa3: removed duplicate entries in defconfig
Removed flags which are already part of techpack
defconfig.

Change-Id: I4f3f535413f397a0785ee4a774b6d7082a499b05
Signed-off-by: sivakanth vaka <svaka@codeaurora.org>
2020-07-13 22:28:23 +05:30
Guru Das Srinagesh
1df95fc509 power: supply: qti_battery_charger: Enable Ship mode shutdown
This feature is to enable the disconnection of the battery from the
device as the final step in the assembly of a phone on the factory floor
to prevent battery rundown while in transit to the hands of the final
consumer.

Usage:
  # echo 1 > /sys/class/qcom-battery/ship_mode_en
  Following this, either manually shut down using power key, or:
  # reboot -p

Change-Id: Ifef053c6ebb3b86c10f9dbe3c9c47d7c3548d95b
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
2020-07-13 09:55:01 -07:00
Pankaj Gupta
88b04acc6e msm: kgsl: Add snapshot size and highest bank bit for a619
Add GPU core configuration of snapshot_size and highest_bank_bit
for A619 GPU.

Change-Id: I1df21e8f32b6a2e120bf80697fc40a0a6ff65775
Signed-off-by: Pankaj Gupta <gpankaj@codeaurora.org>
2020-07-13 21:03:53 +05:30
JaeHun Jung
e265d59708 ANDROID: sound: usb: Add vendor's hooking interface
In mobile, a co-processor can be used with USB audio to improve power
consumption.  To support this type of hardware, hooks need to be added
to the USB audio subsystem to be able to call into the hardware when
needed.

The main operation of the call-backs are:
  - Initialize the co-processor by transmitting data when initializing.
  - Change the co-processor setting value through the interface
    function.
  - Configure sampling rate
  - pcm open/close
  - other housekeeping

Known issues:
  - This only supports one set of callback hooks, meaning that this only
    works if there is one type of USB controller in the system.  This
    should be changed to be a per-host-controller interface instead of
    one global set of callbacks.

Bug: 156315379
Change-Id: I32e1dd408e64aaef68ee06c480c4b4d4c95546dc
Signed-off-by: JaeHun Jung <jh0801.jung@samsung.com>
[rework api to be a bit more self-contained and obvious - gregkh]
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
2020-07-13 17:24:54 +02:00
Vinayak Menon
f96d3d9c9e mm: remove the speculative page fault traces
The speculative page fault trace header inclusion
breaks GKI. Remove the header inclusion and traces,
but keep the trace header for any debug use.

Change-Id: I5f32343c07cf00bce705f7bee45434ff624c1458
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
2020-07-13 18:02:46 +05:30
Taniya Das
c8f4f2ec53 clk: qcom: gcc: use the holi specific vdd file
Update to use the holi specific voltage corner file for GCC clock
driver. Also add the ufs/pcie ref clocks and the cdiv clock for disp
gpll0 clock.

Change-Id: I9dfe60e301a1678574f238a36edfebaa8e4bfe5c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-07-13 01:33:55 -07:00
Veerabhadrarao Badiganti
d4111cad7e BACKPORT: mmc: sdhci-msm: Set IO pins in low power state during suspend
Configure SDHC IO pins with low power configuration when the driver
is in suspend state.

Change-Id: Ia099d77289e8c3e2ced8fca718563ab366a4c6f5
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/1594213888-2780-2-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-07-13 12:21:55 +05:30
qctecmdr
c65a75e36e Merge "bindings: clock: gcc: Add support for REF clock for HOLI" 2020-07-12 22:44:26 -07:00
qctecmdr
17091946a7 Merge "memshare: Move ramdump collection to AFTER_SHUTDOWN event" 2020-07-12 22:44:26 -07:00
qctecmdr
be8bc26508 Merge "Move from dma_buf_kmap to dma_buf_vmap for ION" 2020-07-12 22:44:25 -07:00
qctecmdr
bd0cd68da8 Merge "defconfig: arm64: Enable the GPUCC clock controller" 2020-07-12 09:14:08 -07:00
Taniya Das
1a17935ff6 defconfig: Enable CPUFREQ HW module for cpu scaling
CPUFREQ HW is required to enable CPU scaling.

Change-Id: Ibbd3c02890ae8d0c3c75940a7f352c41f54594a0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-07-12 11:31:50 +05:30
qctecmdr
8ab3f60d76 Merge "clk: qcom: gpucc: Add Graphics Clock controller for HOLI" 2020-07-11 22:49:05 -07:00
Manikandan Mohan
094f1d2ff3 cnss2: Add debug assert on idle restart timeout
On idle restart failure, power down the device and assert for
debug.

Change-Id: I0b77a9d2087e08bfa3051367a7789999c070bf00
Signed-off-by: Manikandan Mohan <manikand@codeaurora.org>
2020-07-11 08:47:18 -07:00
Mao Jinlong
c4acfc2dc9 tmc-etr: Call usb_qdss_open after all etr settings are done
As there is etr status check in usb notifier, call usb_qdss_open after
all etr settings are done to avoid the race condition between etr status
and usb notifier call.

Change-Id: Ib4b5ca8001ca135539e0d55cbb86cb061b564e9d
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-07-11 03:45:53 -07:00
qctecmdr
92256f55c6 Merge "mm: allocate swapin pages from movable zone" 2020-07-10 21:39:50 -07:00
qctecmdr
eae09343d1 Merge "mm: workingset: remove zero-seek setting for shadow node shrinker" 2020-07-10 21:39:49 -07:00
qctecmdr
44d49eecfb Merge "msm: adsprpc: limit number of pending invocations to DSP" 2020-07-10 21:39:49 -07:00
qctecmdr
4c58861b81 Merge "mmc: Change locking for clk scaling from bh to irqsave" 2020-07-10 21:39:49 -07:00