Commit graph

882,466 commits

Author SHA1 Message Date
Chris Lew
90f8f682ed neuron: ch_haven: Move msgq init to sync thread
The neuron channels may init and probe before the secondary vm is
loaded and the resources queried from resource manager. This results
in either a blocking call or EAGAIN returned when sending a doorbell.

Move the msgq_init call from the probe to the channel sync thread. This
will ensure the init thread can continue if the doorbell send api needs
to block or busywait loop.

Change-Id: I0f5562968d59a3dc0a361aca9e4e60ffebcb70be
Signed-off-by: Chris Lew <clew@codeaurora.org>
2020-04-27 10:51:09 -07:00
Elliot Berman
d5e23615ea haven: dbl: Support registration before dbl probe, resource population
Currently, doorbell registration fails if a client driver attempts to
probe before the doorbell probe since data structures are not
initialized. Add an initialized flag which registration functions can
check if data structures are initialized.

Doorbell RX registration also fails if done before cap table is
populated since RX IRQ is not yet known and RX registration attempts to
register IRQ handler. IRQ registration should happen when populating the
doorbell capabilities regardless of whether a client has registered.

Change-Id: I448b291a5885683bee48b2eb34b51faba69a03bf
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-04-27 10:51:09 -07:00
Elliot Berman
90bc10978d haven: dbl: Initialize cap ids to HH_CAPID_INVAL
Currently, the cap-ids for doorbells are initialized to 0. However, 0 is
a valid value for cap-id. Instead, initialize cap-ids to HH_CAPID_INVAL
in the doorbell driver.

Change-Id: Ia1588ed372f0657444e1ab39eab9e6c1e6d3d156
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-04-27 10:51:08 -07:00
Murali Nalajala
cfa1320d7f soc: qcom: guestvm loader enhancements
RM-VM(Resource Manager) send various vm status notifications(INIT/READY/
RUNNING etc) back to primary VM while PIL loader is loading the VM
images. Listern to these notifications and make a call to get the
hypervisor resources to configure doorbell and message queues.

Change-Id: Ia378a1df82ef960e2c11bf715100e38de82b670c
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
2020-04-27 10:51:08 -07:00
Murali Nalajala
ebba4e821d haven: rm: Add support to get hypervisor resources
VMs need to make GET_HYP_RESOURCE call to get resource information (dbl,
msgqs) associated between VMs. If the caller VM want to get resources
associated with another VM, caller VM has to supply the VMID of the
end point. Add support to get hypervisor resources.

Change-Id: Id5f16796ba2a84917c9a072cfeb36d24010e34da
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
2020-04-27 10:51:07 -07:00
Elliot Berman
a7f85f2873 haven: rm: Update dt parsing to match Haven-supplied nodes
Haven hypervisor provides RM dt entries in a slightly different format
than has been used. Namely: the compatible string, capids are now
described by "reg" property, VMID/owner vmid is in a sibling DT node,
and names of some properties are changed. Thus, update RM driver to
parse accordingly. Common message queue dt parsing was moved into the
msgq driver helper function "hh_msgq_probe".

Change-Id: If3fe026bb6055267705a19d8ed7fd90ef0934270
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-04-23 18:42:52 -07:00
qctecmdr
d5ee68b825 Merge "dwc3-msm: Skip querying speed and cc_state with EUD extcon device" 2020-04-23 08:57:45 -07:00
qctecmdr
6cd86f4ad7 Merge "soc: qcom: spcom: enable config spcom as DLKM for GKI" 2020-04-23 08:57:44 -07:00
qctecmdr
e9a988cd7f Merge "cnss2: Add platform driver code to handle hang event data" 2020-04-23 08:57:44 -07:00
qctecmdr
fc207164d8 Merge "cnss2: Update WLFW QMI host cap message" 2020-04-23 04:14:55 -07:00
qctecmdr
e870855626 Merge "cnss2: Skip link down recovery if link has been recovered by retry" 2020-04-23 04:14:53 -07:00
qctecmdr
4643c9d658 Merge "clk: qcom: clk-alpha-pll: Add support for Agera print registers" 2020-04-23 04:14:53 -07:00
qctecmdr
9a52eb776c Merge "cnss2: Add SRAM dump in pci dump collection" 2020-04-23 04:14:53 -07:00
qctecmdr
4b59da9515 Merge "tmc-etr: Check if it is mode switch action during disable etr" 2020-04-23 04:14:52 -07:00
qctecmdr
fc3cca74ab Merge "clk: qcom: gdsc-regulator: Add support for votable GDSCs" 2020-04-23 04:14:52 -07:00
Konstantin Dorfman
3987476053 soc: qcom: spcom: enable config spcom as DLKM for GKI
This change enables spcom driver configuration as DLKM for GKI.

Change-Id: Ica83f7b5cec28ab227250e72c3ae09e6bef1a906
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
2020-04-23 09:41:04 +03:00
Mohammed Siddiq
dd5833c6d4 cnss2: Add platform driver code to handle hang event data
On SSR, FW writes hang data in the carved out region from
existing DDR memory, the platform driver copies the hang
event data from the fixed offset to local buffer and sends
the buffer and length to host driver via CNSS_HANG_EVENT
event.

Change-Id: I5928821770086547b4fe17c30a967ea059b39394
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2020-04-23 11:50:33 +05:30
qctecmdr
467622935a Merge "cnss2: update firmware name for QCA6490 rev.2.0" 2020-04-22 22:37:48 -07:00
qctecmdr
f1457cf3a9 Merge "input: touchscreen: focaltech_touch: Configure power supply" 2020-04-22 22:37:48 -07:00
qctecmdr
f98f120507 Merge "mhi: core: Prevent MHI reg read upon endpoint crash" 2020-04-22 22:37:48 -07:00
qctecmdr
17da67d66a Merge "wigig_sensing: print burst size" 2020-04-22 22:37:47 -07:00
qctecmdr
186ebf81a9 Merge "msm: kgsl: Add CP_APRIV_CNTL and CP_SMMU_STREAM_ID regs to snapshot" 2020-04-22 22:37:47 -07:00
qctecmdr
64823aedd3 Merge "arm64: defconfig: Add support for torture tests on Lahaina" 2020-04-22 22:37:46 -07:00
Mao Jinlong
0f06d1e6aa tmc-etr: Check if it is mode switch action during disable etr
When switch mode with etr being enabled more than one time, it needs
to reset all the etr settings for previous mode instead of return busy.

Change-Id: I243a6d910bb3dd8ac9ca30dadbd1c6ab3cefd00f
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-04-22 19:20:23 -07:00
Manikandan Mohan
4fe0a8704a cnss2: Add SRAM dump in pci dump collection
Add SRAM dump in PCI dump collection on crash shutdown
path.

Change-Id: I976f2f2883eb1dfcca180228137382aa14146084
Signed-off-by: Manikandan Mohan <manikand@codeaurora.org>
2020-04-22 18:59:20 -07:00
Yue Ma
cd68afdcc7 cnss2: Skip link down recovery if link has been recovered by retry
There is no need to proceed link down recovery if link has been recovered
by retries during power on sequence.

Change-Id: I876f2e239b519d4230b5c115cdc05ff7650f5cd1
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-04-22 17:14:11 -07:00
Yue Ma
2b247445d3 cnss2: Update WLFW QMI host cap message
Update new field to WLFW QMI host cap message.

Change-Id: Id2ca69b9b27f68a827baa69239c41ee76f324430
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-04-22 17:01:48 -07:00
Yue Ma
e6437c634f cnss2: Add support to send host SMMU IOVA range to firmware
With the valid SMMU IOVA range WLAN firmware is able to detect invalid
host DDR access before SMMU fault happens.

Change-Id: I3a3aac4e1da7bb7747bfe3b352df33fc87221860
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-04-22 17:00:18 -07:00
qctecmdr
2d968914ce Merge "soc: qcom: spcom: Provide retry mechanism for spss" 2020-04-22 12:58:17 -07:00
qctecmdr
608f2d38c1 Merge "soc: qcom: Add support for early brought out subsystems" 2020-04-22 12:58:16 -07:00
qctecmdr
304f2f125b Merge "neuron: block_client: Fix init loop" 2020-04-22 12:03:58 -07:00
qctecmdr
1efc1b290a Merge "msm: synx: validate external callback" 2020-04-22 12:03:57 -07:00
qctecmdr
29f8698ee9 Merge "mmc: sdhci-msm: Avoid enable SD power if card is not present" 2020-04-22 12:03:57 -07:00
qctecmdr
03de949cee Merge "iommu/arm-smmu: Record page table configuration in debug structures" 2020-04-22 12:03:56 -07:00
qctecmdr
9830d02ea4 Merge "platform: msm: allow external display registration from kernel module" 2020-04-22 12:03:56 -07:00
Mayank Rana
bab513b2a5 dwc3-msm: Skip querying speed and cc_state with EUD extcon device
EUD extcon device doesn't provide speed and cc_state information.
Hence skip querying speed and cc_state with it.

Change-Id: Ibe9e327fa412c8fd1fac0b1db3ba3be5d210f33c
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-04-22 11:50:52 -07:00
Taniya Das
dcdabc5d84 clk: qcom: clk-alpha-pll: Add support for Agera print registers
Agera PLL print registers are required to get the PLL values
from the debugfs, thus add support for the same.

Change-Id: I4b708958e1125ce7e8eab945a3c15113739230d4
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-22 17:01:24 +05:30
Taniya Das
8f23926d01 clk: qcom: clk-alpha-pll: Add support for Agera PLL
Agera PLL is required to be supported from HLOS clock controller, thus
add support for agera pll ops.

Change-Id: I77b2a741667accf9bd0eecfcd0dabfaf7596345f
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-22 16:58:16 +05:30
Taniya Das
78e4312f89 clk: qcom: clk-alpha-pll: Add support for Legacy FSM Mode
The Legacy FSM Mode is required to be set when the Fabia PLL needs to be
used in non-FSM mode, thus add support for same.

Change-Id: I23d491cb33391dce1eb21d9ced298001da9ef907
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-22 14:30:47 +05:30
Gidon Studinski
db1a65c003 wigig_sensing: print burst size
Burst size must be printed in perf builds as it is a major
characteristic of the system.

Change-Id: I7e6013751333bb487e2d9422726e41b1050aca43
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
Signed-off-by: Alexei Avshalom Lazar <ailizaro@codeaurora.org>
2020-04-21 23:38:40 -07:00
Deepak Kumar
89c1ee2a34 msm: kgsl: Add CP_APRIV_CNTL and CP_SMMU_STREAM_ID regs to snapshot
Update snapshot register list to add CP_APRIV_CNTL and CP_SMMU_STREAM_ID
registers. This is needed to capture complete CP state required for
debugging.

Change-Id: Icb8c35481de12dde43aab666f0ecad2240dcaa35
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
2020-04-22 11:15:51 +05:30
Hemant Kumar
3137078429 mhi: core: Prevent MHI reg read upon endpoint crash
MHI reset is triggered as part of EP shutdown. Shutdown
is blocked until MHI RESET bit is cleared in MHI CTRL reg.
There is a possibility of PCIe link going down during this
time. Since MHI RESET bit never gets cleared after 2 sec
wait_event_timeout reads the MHI CTRL reg and this results
into a memory abort. Fix this issue by using a boolean flag
as condition in wait_event_timeout. This flag is set when
MHI reset is triggered and cleared when reset is done.

Change-Id: I5b1831518255a38cde5b60406b5b9e9386b5477e
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2020-04-21 21:33:36 -07:00
qctecmdr
983f8387ac Merge "clk: qcom: clk-alpha-pll: Add support for Regera print registers" 2020-04-21 20:22:00 -07:00
qctecmdr
37082b4dbe Merge "HID: qvr: Adding numerator and denominator to sensor data" 2020-04-21 20:22:00 -07:00
qctecmdr
1429759c8a Merge "msm: adsprpc: initialize async job member of context structure" 2020-04-21 20:21:59 -07:00
qctecmdr
35c73f0ac3 Merge "msm: kgsl: Make the gpubw governor immutable" 2020-04-21 20:21:59 -07:00
qctecmdr
c77e17b5a4 Merge "msm: kgsl: Do not modify UCHE_CMDQ_CONFIG register for A660" 2020-04-21 20:21:59 -07:00
qctecmdr
bcf1293b7c Merge "mhi: core: Make sure reg_write_q stores visible to other cores" 2020-04-21 20:21:58 -07:00
qctecmdr
7e1ab36b47 Merge "msm: ipa4: capture the unclock gsi IPA register access" 2020-04-21 20:21:58 -07:00
Fei Mao
c854036b4c input: touchscreen: focaltech_touch: Configure power supply
Configure proper valotage and load values for AVDD.

Change-Id: I491398709f3498070390146ea110691dc58b819c
Signed-off-by: Fei Mao <feim1@codeaurora.org>
2020-04-21 18:37:52 -07:00