The PON_HLOS module does not have the PON_DEBOUNCE_CTL register
to read the debounce delay configured for KPDPWR debounce.
This register is present in PON_PBS peripheral. Due to this the
software debounce control logic does not work as expected. To fix
this add support to read the PON_PBS peripheral from PON_HLOS
module by adding PON_PBS register as a second SPMI register base
in device tree node.
Change-Id: I15737a3dc6e8c99cd21531685c41ec1b2752b2ef
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Some remote edge initial rx channel state is set to CLOSING, in this
scenario, allow creation of smd device for this edge.
Change-Id: I5937b8f2451630c9ecbe8627ab8817a4ce00e673
Signed-off-by: Suresh Kumar Allam <allamsuresh@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Increment NR_ISOLATED_ANON when isolate a page so that the same is
decremented when the page migration is successful or when adding pages
back to the lru.
Change-Id: I6879c0029342560496b79d649a77283c767ab08e
Fixes: aa3fa08df4 ("mem-offline: improve the effective utilization of movable zone")
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Return the captured value during TX and RX config from API
dmaengine_slave_config().
Also For LE VM case, do not touch resources like clocks, ICB vote,
GPIO etc. LE VM doesn't need resources to be controlled in TVM for
now till we have SOC infra support.
Change-Id: Iaa74b1b12a53da5764b1766188075349f3c42db8
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
Memlat and compute governors are made immutable to avoid governor
switch at run time as the devices using these governors are tightly
coupled with hardware features. These governors allocate pmu counters
to count various events used in the algorithm. These counters are
allocated exclusively for algorithm's use.
This leaves limited counters available for other uses in the system
such as profiling in user space using perf tool. Add and export a
function in devfreq memlat governor to remove immutable flag to allow
governor switch, which in turn can free pmu counters.
Similarly add and export a function in rimps_memlat driver to
free pmu counters.
The intended use of these functions is to be called by test modules
to allow freeing of pmu counters at runtime.
Change-Id: I243a3201368d5a82aeaf820e775cdc1aecdfea07
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
Discard character printing in ipc log buf when get_next_logbuf()
returns count value less than the size argument.
Change-Id: I0ba388400c76c16da423a2ccb67d961ed31e87b4
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
set_event will return NULL if event_id is not valid, the
caller is proceeding further without proper check for NULL.
Update pmu event setup function to check pevent for NULL.
From the RIMPS perspective, pmu counter IDs 0 and 1 correspond
to 64bit cycle counter with ID 0 representing low 32 bit and
ID 1 representing high 32bit, while the counter IDs from 2 to 7
correspond to remaining PMUs. At the time of storing pmu counter
values to RIMPS shared memory, the function store_event_val()
stores both low and high 32bit values of cycle counter when ID 0 is
passed as argument to pmu index, hence no need to handle ID 1
separately. Update logic accordingly to drop check for ID 1.
Change-Id: Idd345c825572710753f18306f565043347921216
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
Remove parallel support for smb1351, as it is not
required for sdxnightjar.
Change-Id: I4b6b39fed9871559a4d8a200b1de9fb8784ead5e
Signed-off-by: Kavya Nunna <knunna@codeaurora.org>
Update master and slave ID constants for all Qualcomm Technologies, Inc.
Yupik interconnect providers which consumers can use to set bandwidth
constraints and find paths in the NoC (Network-On-Chip) topology.
Change-Id: I0deffed7d8c08d5921cd54b396fa7daad673550e
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Commit 3bb697514e ("usb: dwc3: Add support for nominal
elastic buffer") breaks working of current 5.4 kernel
based targets by clearing elastic buffer which is not
expected. Hence revert the change.
Change-Id: I3a492289eea1cb728c2e16ea1b991862d2219bbe
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
If we want to disable clocks but still keep the link active, both
ref_clk and core_clk_unipro should be skipped.
Commit 284fa080cb5f ("scsi: ufs: fix broken hibern8_on_idle sysfs
nodes") is the original change from msm-4.14. We pick it up to msm-5.4
due to upstream missed this change. To follow GKI policy on 5.4, we
simplifed it and kept parameters name to avoid breaking ABI.
Change-Id: I5f86775c150e495322d14ec57ebf76a710257931
Signed-off-by: Ziqi Chen <ziqichen@codeaurora.org>
it will rarely causes bluetooth enable failure due to
enable already enabled clock, so take this scenario as
warning intead of error.
CRs-Fixed: 2824381
Change-Id: I8e52ff659787fa805469ed808643ef281aa6750d
Signed-off-by: Zijun Hu <zijuhu@codeaurora.org>
Reuse the sysfs buf when it is not NULL.
Change-Id: I4fe62e2bb645f1ed4eced4f9888a84da8754574d
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
Use the exported function instead of kallsyms_lookup to get
log_buf size, this can save a lot of time during boot up.
Change-Id: I99fe49e9f014c0a4bb16162d836c38e31236e8ea
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
Add Graphics clock controller driver for the GPU clients to be
able to control clocks.
Change-Id: I42cc7ba81c7b1dca8fd62979a0fd4a0d620eca70
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
PLL configuration functions can be used by clock drivers
in probe functon to bringup the PLL, so export the same in
order for clock drivers to be compiled as modules.
Change-Id: I655cbec391f1225851d4bda4e3c0613e0d784918
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
IRQ workqueue handler should be initialized before irq register,
or that when irq was triggered, could lead a crash.
Change-Id: If5551f622ae58a75ae655d4752bb397af0a00f98
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
