Commit graph

875,511 commits

Author SHA1 Message Date
qctecmdr
9753b2fda8 Merge "usb: dwc3-msm: Add soft dependency on phy drivers" 2019-12-05 19:00:03 -08:00
qctecmdr
666a2266c1 Merge "msm:ipa: changing err prints to dbg prints" 2019-12-05 19:00:03 -08:00
qctecmdr
3045517e4c Merge "msm: kgsl: Replace the sorted dispatcher pending list" 2019-12-05 18:24:07 -08:00
qctecmdr
16a5189304 Merge "msm: kgsl: Make 'globals' a device level debugfs file" 2019-12-05 17:48:02 -08:00
qctecmdr
d92a6815ac Merge "PM / devfreq: icc: Add suspend/resume APIs" 2019-12-05 15:25:59 -08:00
Michael Adisumarta
92b1788390 msm:ipa: changing err prints to dbg prints
using debug prints instead of err prints

Change-Id: Iaf667ca33e47f867dbd118f4d839f2e8e955f557
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-12-05 12:46:24 -08:00
qctecmdr
ce549bfb36 Merge "serial: Add UART port for EUD" 2019-12-05 12:19:11 -08:00
qctecmdr
a051fe801d Merge "msm: adsprpc: Fix adsprpc info leak" 2019-12-05 11:16:20 -08:00
qctecmdr
909a087306 Merge "dmaengine: gpi: Add support for 32-bit kernel" 2019-12-05 10:36:59 -08:00
Raghavendra Rao Ananta
973373accb usb: dwc3-msm: Add soft dependency on phy drivers
dwc3-msm driver is functionally dependent on the phy-generic,
phy-msm-snps-hs, and phy-msm-ssusb-qmp drivers. Hence, explicitly
add a soft-dependency on it to avoid unnecessary re-probes
when built as a module.

Change-Id: I16d3a3fb72a968b0ae7935df74cff86697a97c32
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2019-12-05 09:45:58 -08:00
Vipin Deep Kaur
f73e094379 dmaengine: gpi: Add support for 32-bit kernel
Add new macros in GSI driver to support 32-bit
architecture.

Change-Id: I7fd9867b19458ac962a87c03dfcf2ea570a4de69
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
2019-12-05 04:35:28 -08:00
Vipin Deep Kaur
e3225c64c9 dmaengine: gpi: Capture GPI hardware status during GSI General interrupt
Debug patch to capture GPI hardware status when a GSI General interrupt
is triggered.

Change-Id: I81a5d3858bd295383cd1079394fb161930d63913
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
2019-12-05 04:33:45 -08:00
qctecmdr
f97b25d749 Merge "arm64: defconfig: Enable CONFIG_I2C_RTC6226_QCA on Lahaina" 2019-12-05 02:36:07 -08:00
qctecmdr
75bffc503f Merge "arm64: defconfig: Enable RPMh clock driver for Lahaina" 2019-12-05 02:36:06 -08:00
qctecmdr
ad0c7ffd79 Merge "arm64: defconfig: Disable hvc console for lahaina SoC" 2019-12-04 16:37:28 -08:00
qctecmdr
f41050307f Merge "firmware: qcom-scm: Fix formatting errors in the trace string" 2019-12-04 14:57:36 -08:00
Prakruthi Deepak Heragu
d74757773f serial: Add UART port for EUD
This commit adds new UART port to support UART available on Embedded
USB Debugger (EUD).

Change-Id: Ib2bcf15df04875e5d9eb7ce3dc30f1d187236279
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2019-12-04 14:42:14 -08:00
Saravana Kannan
74a06b81ab PM / devfreq: icc: Add suspend/resume APIs
Absence of traffic is guaranteed when the device sitting behind a devbw
device is suspended. In such cases, it is a waste of power to make non-zero
bandwidth votes or to scale the devbw device. So, provide APIs to
suspend/resume the devbw device as needed.

Change-Id: Id58072aec7a9710eb917f248d9b9bd08d3a1ec6a
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: renamed devbw to icc and made minor styling change]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2019-12-04 12:04:25 -08:00
Saravana Kannan
2fa5f6f0b3 PM / devfreq: governor_bw_hwmon: Add suspend/resume support
Some devfreq devices using this governor might need suspend/resume support.
When suspended, those devices won't need any bandwidth votes and there is
no point in monitoring their bandwidth either.

Therefore, upon suspend, vote for zero bandwidth and stop the HW monitor.
Upon resume, vote for the previous bandwidth and start the HW monitor.

Change-Id: I318449995d714959f0ebfe91961bc23fa8edbd04
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: resolved trival merge conflicts and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2019-12-04 12:04:24 -08:00
Saravana Kannan
716a02830d PM / devfreq: Add MSM BIMC bwmon support for bw_hwmon governor
The BIMC bwmon device supports monitoring read/write traffic from each BIMC
master port. It also has the capability to raise an IRQ when the traffic
count exceeds a programmable threshold. This allows for it to be used with
the bw_hwmon governor to scale the BW requests from each BIMC master.

Change-Id: Ie8a1471226411e23954ed556292186a5a864ddc1
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2019-12-04 12:04:23 -08:00
Saravana Kannan
40f77da0e2 msm: devfreq_icc: Add devfreq driver for device bandwidth voting
This driver registers itself as a devfreq device that allows devfreq
governors to make IB/AB bandwidth votes. This driver allows the governors
to be agnostic of the bandwidth voting APIs, the number of master ports or
slave ports, the actual port numbers, the system topology, the available
frequencies, etc.

Change-Id: If055ddd580afd41f9668b111e6c09a047488b2e0
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: moved to icc framework, renamed to devfreq_icc and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2019-12-04 12:04:22 -08:00
Saravana Kannan
f8c87ae46a devfreq: Add CPUBW HW monitor governor
The CPUBW HW monitor devfreq governor uses the Krait L2 PM counters to
determine the bandwidth needed by the Krait CPU subsystem. This governor
can be used in conjunction with the CPUBW devfreq device to dynamically
scale the DDR frequency based on the demand/actual usage from the Krait CPU
subsystem. Since this governor uses the Krait L2 PM counters it can
conflict with certain profiling tools.

The Krait L2 performance monitor counters have the capability to count the
no. of read/write transactions going out the master ports. They also have
the capability to raise interrupts when they overflow. This driver uses
those counters to determine the true usage of DDR from the Krait processor
subsystem and then recommends CPU DDR BW votes based on the measured values
and the following tunable parameters.

The driver provides various tunables that allow it to be tuned more in
favor of power or performance:

- io_percent: The percentage of the CPU time that can be spent waiting on
  memory I/O. Lower value is better performance and worse power.

- sample_ms: The sampling period in milliseconds. This only affects the
  sampling period when DDR use is ramping down or is increasing very slowly
  (See tolerance_percent).

- tolerance_percent: The minimum increase in DDR use, compared to previous
  sample, that will trigger an IRQ to immediately bump up the bandwidth
  vote. It's expressed as a percentage of the previous sampled DDR use.

- decay_rate: The parameter controls the rate at which the history is
  forgotten when ramping down. This is expressed as a percentage of history
  to be forgotten.  So 100% means ignore history, 0% mean never forget the
  historical max. The default 90% means forget 90% of history each time.

- guard_band_mbps: This is a margin that's added to the measured BW (and
  hence also the Bus BW votes) that's present to account for the time it
  takes to ramp up the DDR BW while the CPU continues to use the DDR.

- bw_step: All BW votes are rounded up to multiples of bw_step. The default
  value is 200 MB/s that turns out to ~25 or 12.5 MHz based on the SoC. A
  smaller value would mean more frequent bus BW changes. A higher value
  would mean less frequent BW vote updates, but also means at times an
  unnecessarily higher BW vote (due to the rounding up).

Change-Id: I88629a3e545cdca7160af8f8ca616ecc949d9947
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[aparnam@codeaurora.org: Replaced snprintf with scnprintf]
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>
[avajid@codeaurora.org: updated attr definitions and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2019-12-04 12:04:22 -08:00
David Dai
3151b6e98d arm64: defconfig: Enable RPMh clock driver for Lahaina
Enable the RPMh clock driver so that consumers can vote
for real RPMh clocks.

Change-Id: I274f9035b93766473a15731814f16da9f80f4070
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-04 09:31:42 -08:00
qctecmdr
f7ef9d9893 Merge "msm: ipa: Add PIL driver as soft dependency for IPA" 2019-12-04 02:35:00 -08:00
qctecmdr
d4cf41dc2e Merge "media: v4l2-core: guard code against ABI breakage" 2019-12-04 02:34:59 -08:00
qctecmdr
5f14f07b0b Merge "defconfig: enable fastrpc driver on Lahaina" 2019-12-04 01:54:28 -08:00
qctecmdr
bf2389a109 Merge "clk: qcom: add clk rpmh support for Lahaina" 2019-12-04 01:22:17 -08:00
qctecmdr
4d3767fbbb Merge "msm: cvp: Disabe sys cache and dsp initialization" 2019-12-04 01:22:15 -08:00
qctecmdr
de44503b2e Merge "mm: cma: Reduce dmesg spam" 2019-12-04 00:47:31 -08:00
qctecmdr
f07284b38a Merge "mm: cma: restrict base_pfn exposure" 2019-12-04 00:47:30 -08:00
qctecmdr
99049a00e4 Merge "soc: qcom: Add spss transport for Glink Probe driver" 2019-12-04 00:06:54 -08:00
qctecmdr
106819260e Merge "arm64: defconfig: Enable GLINK Packet driver for Lahaina" 2019-12-04 00:06:53 -08:00
qctecmdr
2f61ee8554 Merge "checkpatch: check symlinks while searching compatible strings" 2019-12-04 00:06:52 -08:00
himta ram
4fbd0a6541 arm64: defconfig: Enable CONFIG_I2C_RTC6226_QCA on Lahaina
Enable FM driver as module in defconfig on Lahaina.

CRs-Fixed: 2578335
Change-Id: Ifdffd9591e5769aa881646eb523eb7f44c08ae75
Signed-off-by: himta ram <hram@codeaurora.org>
2019-12-03 22:44:31 -08:00
Edgar Flores
f745eaca11 defconfig: enable fastrpc driver on Lahaina
Enable compilation of the fastrpc driver on Lahaina, which
provides a communication mechanism that allows clients to
make remote method invocations across processor boundary
to applications, compute and sensors DSP processors.

Change-Id: I2a43104e260b3e129e3447840f3180843c10ce3a
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
2019-12-03 22:14:29 -08:00
himta ram
b6f9c071a2 media: v4l2-core: guard code against ABI breakage
Guard the code against ABI breakage using IS_ENABLED Helper macro.
Guarded code will be compiled when config is set to m or y.

CRs-Fixed: 2579332
Change-Id: Ic1a5ab22c8ced2c7b527bf5086c2c7b14fe24919
Signed-off-by: himta ram <hram@codeaurora.org>
2019-12-03 21:41:18 -08:00
George Shen
b12de3763b msm: cvp: Disabe sys cache and dsp initialization
System cache and DSP CVP driver not ready for Lahaina
bring up. Disable them until they are ready.

Change-Id: I70acfe8d53e527f7456084d72d93116a047f919a
Signed-off-by: George Shen <sqiao@codeaurora.org>
2019-12-03 18:16:39 -08:00
qctecmdr
3da863f0f8 Merge "ABI: aarch64: Update ABI snapshot based on v5.4" 2019-12-03 18:00:47 -08:00
qctecmdr
f8008953da Merge "dt-bindings: sound: Add GPR device tree bindings" 2019-12-03 18:00:47 -08:00
Murali Nalajala
4b52ed4ea1 checkpatch: check symlinks while searching compatible strings
"grep -r" option excludes symlinks. This breaks if there are symlinks
present in the bindings and actual source resides outside of the kernel.
To consider symlinks invoke grep with "-R" option.

Change-Id: Ie43876a0caee8f7f5a217391213cbb12efd52ff9
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2019-12-03 17:09:16 -08:00
qctecmdr
aed6dbfc5b Merge "arm64: defconfig: Enable IPC IRQ bridge for Lahaina" 2019-12-03 16:27:01 -08:00
qctecmdr
f6ddaecb4f Merge "ion: msm: Move msm_ion probe to subsys_initcall_sync" 2019-12-03 16:27:00 -08:00
qctecmdr
9745a9b4af Merge "clk: qcom: dispcc: Fix stuck on warning for disp_cc_mdss_mdp_lut_clk" 2019-12-03 16:27:00 -08:00
qctecmdr
1e0cee8ff8 Merge "clk: qcom: dispcc: Voltage voting support for Lahaina" 2019-12-03 16:26:59 -08:00
qctecmdr
1768daa512 Merge "msm: ipa3: Fix to hold the clock until replenish the descriptors" 2019-12-03 15:33:49 -08:00
qctecmdr
5939f51cb4 Merge "msm: ipa3: Fix to increase timeout value for send command" 2019-12-03 15:33:49 -08:00
qctecmdr
0100b2ce16 Merge "mm: usercopy: skip stack page span check" 2019-12-03 15:33:49 -08:00
qctecmdr
eac37ae56c Merge "soc: qcom: secure_buffer: Move to subsys_initcall" 2019-12-03 15:33:48 -08:00
qctecmdr
acfac220ec Merge "arm64: defconfig: Enable the MSM ION heaps on Lahaina GKI" 2019-12-03 15:33:48 -08:00
Patrick Daly
9848b4d838 mm: cma: Reduce dmesg spam
CONFIG_CMA_DEBUG was #defining DEBUG, which has the side effect of
changing the behavior of pr_debug statements to always print into
the dmesg log, as opposed to printing only if they are enabled via
dynamic debug.

Log etiquette indicates that messages should only be printed for
error conditions.

Change-Id: I5eebc1060618a3abc87a7f85ae770505c991c017
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-03 14:01:37 -08:00