Commit graph

892,512 commits

Author SHA1 Message Date
qctecmdr
15d2f647b5 Merge "defconfig: arm64: Enable DDR cooling device for lahaina" 2020-11-19 10:34:32 -08:00
qctecmdr
6f437f7519 Merge "usb: dwc3: Add support for nominal elastic buffer" 2020-11-19 10:34:31 -08:00
Charan Teja Reddy
9c71673f9e mm: memory_hotplug: migration failure info of a page under DEBUG_VM
Put the migration failure info of a page under DEBUG_VM as most of
the times this info is not required.

Change-Id: I798f0bef9c558a272c6aa94424236d8f65f801dd
Signed-off-by: Charan Teja Reddy <[email protected]>
2020-11-19 21:33:52 +05:30
qctecmdr
a1702cebeb Merge "spi: spi-msm-geni: Clear the RX fifo if FIFO has data after timeout" 2020-11-19 06:55:49 -08:00
qctecmdr
2113e65f7b Merge "drivers: thermal: qmi_sensor: Add support for extended sensor list" 2020-11-19 06:55:48 -08:00
qctecmdr
376dd78d67 Merge "defconfig: Enable USB BAM on sdxlemur" 2020-11-19 03:06:15 -08:00
qctecmdr
bba65054f1 Merge "mm: Kconfig: Add support for config size of purging vmap_area" 2020-11-19 03:06:14 -08:00
qctecmdr
5cc19bc1b5 Merge "sched: Fix "releasing a pinned lock" lockdep warning" 2020-11-18 22:31:08 -08:00
qctecmdr
d9b738bc54 Merge "ion: Check for valid vmids for msm system heap" 2020-11-18 22:31:07 -08:00
qctecmdr
2da0027008 Merge "msm: ipa3: Define ipa_get_wdi_version method" 2020-11-18 22:31:07 -08:00
qctecmdr
4a9a5a5300 Merge "pci: msm: Dump PCIe registers to debug linkdown" 2020-11-18 22:31:07 -08:00
Archit Saxena
d1d6afd719 ARM: msm: Define scuba architecture on 5.4
Add initial  architecture support for arch and pincontrol
for scuba on 5.4.

Change-Id: I844f2c3fc0776f77c533808c2cca6f05ee946644
Signed-off-by: Archit Saxena <[email protected]>
Signed-off-by: Nagireddy Annem <[email protected]>
2020-11-19 11:39:44 +05:30
Shyam Kumar Thella
027b2aa609 power: smblite: Add smblite-reg header
Add snapshot of smblite-reg.h as of msm-4.19 'commit 765e7b83f670
("kernel: dma: disallow altering logical map for non-CMA allocs")'

smblite-reg.h is required by QPNP-SMBLITE driver.

Change-Id: I9b9a6e26e02b035d5dfa05a7c0c9a5e7f7158efd
Signed-off-by: Shyam Kumar Thella <[email protected]>
2020-11-19 09:07:35 +05:30
Kishore Sri venkata Ganesh Bolisetty
0162da5ac7 defconfig: enable QGKI & GKI apis of msm_performance driver
CONFIG_MSM_PERFORMANCE_QGKI will enable full functionality of
msm_performance driver on QGKI and minimal functionality on
GKI.

Change-Id: Ie2a2184c9390d904532c4d659d02562c93b7e725
Signed-off-by: Kishore Sri venkata Ganesh Bolisetty <[email protected]>
2020-11-18 09:42:16 -08:00
Ravi Kumar Siddojigari
b649934e08 dm verity: correcting logic used with corrupted_errs counter
Current logic on handling corrupted_errs countes is not considering
DM_VERITY_MAX_CORRUPTED_ERRS limit so correcting the logic.

Change-Id: Ide3f3e6b9d8bec8f02cbb5a72b7d0935bcd87826
Signed-off-by: Ravi Kumar Siddojigari <[email protected]>
2020-11-18 17:25:18 +05:30
Sandeep Singh
8797b2a30a icnss2: Vote for chain1 regulators if RD card is 2x2
Wlan fw will provide RD card chain mask capability
for as part of cap qmi message exchange between host
platform and fw platform. Using this info host platform
will determine whether RD card chain is 1x1 or 2x2. It
will enabled chain1 regulator if RD card is 2x2 and also
if wlan fw doesn't provide any details about RD card
chain mask capability chain1 regulator will enabled
by default.

Change-Id: I83d9058fe505f2519a2300a4989e08acbdbcaafb
Signed-off-by: Sandeep Singh <[email protected]>
2020-11-18 17:20:16 +05:30
qctecmdr
6dd629487f Merge "mmc: core: Add debug enhancement logs" 2020-11-18 01:48:37 -08:00
qctecmdr
070943a3f7 Merge "fsa4480: Resolve euro usb analog headset detect issue after PDR" 2020-11-18 01:48:37 -08:00
Sachin Grover
3c775579c0 arm64: defconfig: Enable CRYPTO_SHA1_ARM64_CE algorithm
This is to enable SHA-1 digest algorithm (ARMv8 Crypto Extensions).

Change-Id: I04146376bbd22682f729f1617ab4dfaae3beda24
Signed-off-by: Sachin Grover <[email protected]>
2020-11-18 01:14:22 -08:00
Vaibhav Agrawal
ab87b60fa7 mmc: host: Handle config dependencies for cqhci crypto
Add and remove the needed depedencies in the cqhci
crypto drivers on the CONFIG_MMC_CQHCI_CRYPTO
config. This is needed to make driver successfully
compile as a module and be gki compatible.
Add module license and module description for
cqhci-crypto and cqhci-crypto-qti drivers.

Change-Id: I0da29a7d19d2f2606f5c85316ab47c6df73e66d7
Signed-off-by: Vaibhav Agrawal <[email protected]>
2020-11-18 00:38:44 -08:00
Maulik Shah
45863ee2a3 drivers: irqchip: qcom-pdc: Add PDC IRQ chip support for sm8150
Add PDC interrupt controller chip support for sm8150.

Change-Id: I5fc53d3567f779961d6afe7fe36d47bbaa0f9590
Signed-off-by: Maulik Shah <[email protected]>
2020-11-18 12:44:54 +05:30
Maulik Shah
7a1eafa301 pinctrl: qcom: Use TLMM and PDC for dual edge wakeup interrupts
Although PDC has the capability to route falling edge interrupt to
GIC by inverting the input signal, falling edge of the interrupts marked
as dual edge type is routed as is. This causes GIC to ignore to falling
edge of these interrupts when the system is active. During APSS system
sleep once PDC starts monitoring these interrupts, PDC always replays a
rising edge irrespective of which edge woke the APSS from sleep.  So,
the issue does not happen during the system sleep.

To address the issue when system is active, route the falling_edge
of these interrupts through one of the direct connect interrupts
available for APSS. The original GIC interrupt is configured as dual
edge at PDC, rising edge at GIC (same as earlier, this does not change).

This solution requires additional programming of 2 registers:

TLMM_<ZONE>_DIR_CONN_INTRn_CFG_HMSS - program GPIO_SEL with the gpio
number and set POLAIRTY to 0 for inverting the falling edge

TLMM_GPIO_INTR_CFGn - set DIR_CONN_EN bit to 1 for enabling direct
connect for gpio.

Change-Id: Iaa9dfe391ef4942cd8b12fd1e7d8f9c238947af2
Signed-off-by: Archana Sathyakumar <[email protected]>
Signed-off-by: Maulik Shah <[email protected]>
2020-11-18 12:44:36 +05:30
Pavankumar Kondeti
c83a851f7d sched: Fix "releasing a pinned lock" lockdep warning
WALT requires both src and dst runqueue locks to be held
during migration. So a double_lock_balance() is added
in move_queued_task() before calling set_task_cpu(). However,
releasing the src rq lock, which is pinned is giving a
lockdep warning. Fix this by unpinning the lock before
calling double_lock_balance.

Change-Id: I64dec0701b3467185cf53f311ebb521c6a822e88
Signed-off-by: Pavankumar Kondeti <[email protected]>
2020-11-18 08:58:35 +05:30
qctecmdr
ce480240e1 Merge "dt-bindings: clock: Update clock ids of GPUCC for YUPIK" 2020-11-17 17:05:50 -08:00
qctecmdr
03d0199dd1 Merge "dma: gpi: Correct the return code in dmaengine_pause api" 2020-11-17 17:05:50 -08:00
qctecmdr
53c40d0501 Merge "mmc: sdhci-msm: Use auto suspend instead of sync" 2020-11-17 17:05:49 -08:00
qctecmdr
37c562ad9d Merge "mmc: sdhci-msm: Set PWRSAVE bit to '0' during tuning" 2020-11-17 17:05:49 -08:00
qctecmdr
b414bf80c4 Merge "tzlog: Update structs as per the new requests" 2020-11-17 17:05:49 -08:00
qctecmdr
756b932c44 Merge "serial: msm_geni_serial: Add enable/disable of dma irq bits" 2020-11-17 17:05:48 -08:00
qctecmdr
6652990708 Merge "msm: kgsl: Increase MAX_PWRLEVELS Limit" 2020-11-17 17:05:48 -08:00
qctecmdr
61717f9f5f Merge "soc: qcom: msm_perf: enable msm_perf driver on default config" 2020-11-17 17:05:48 -08:00
qctecmdr
2f8aed210e Merge "msm: msm-geni-se: Add proxy votes to fix earlycon crash" 2020-11-17 17:05:47 -08:00
Guru Das Srinagesh
89b3ff97d2 defconfig: sdxlemur: Enable writeable thermal zone trips
Enable setting trip thresholds in thermal zones for debug purposes.

Change-Id: Ifbd154ba343a319cbd9ddca24efe539db557abbd
Signed-off-by: Guru Das Srinagesh <[email protected]>
2020-11-17 16:59:54 -08:00
Linyu Yuan
163554e4c7 usb: dwc3: add DWC3_CONTROLLER_PULLUP event
when gadget pullup, add this event allow redriver
do some operation according to the pullup state.

Change-Id: I9cbd3f9e95aae327e1f872aff7ebff7a8926e5a5
Signed-off-by: Linyu Yuan <[email protected]>
2020-11-17 16:50:40 -08:00
Linyu Yuan
f3872ee37a usb: misc: nb7vpq904m: fix issue when connect USB hub
when redriver connect to a USB hub, and do adb root operation,
due to redriver rx termination detection issue,
hub will not detct device logical removal.
workaround to temp disable/enable redriver when usb pullup operation.

Change-Id: Ia3b0c99a28dd7d0601e7c5bcc612c4c48447c165
Signed-off-by: Linyu Yuan <[email protected]>
2020-11-17 16:49:56 -08:00
qctecmdr
49b2e4a13c Merge "f_fs: fix scheduling while atomic issue of ffs_epfile_io()" 2020-11-17 13:29:01 -08:00
qctecmdr
55b65a4d60 Merge "defconfig: sdxlemur: Allow writing to regmap only on debug builds" 2020-11-17 13:29:01 -08:00
qctecmdr
4c48eb3326 Merge "icnss2: Avoid sending qdss_trace_mem_info to fw if it is down" 2020-11-17 13:29:00 -08:00
qctecmdr
003a1824ff Merge "msm: kgsl: Properly set fault bit in adreno_set_gpu_fault" 2020-11-17 13:29:00 -08:00
qctecmdr
2129bf638c Merge "cfg80211: Add support to calculate and report 4096-QAM HE rates" 2020-11-17 13:29:00 -08:00
qctecmdr
f6b4905d47 Merge "input: touchscreen: mxt: remove disable_irq" 2020-11-17 13:28:59 -08:00
qctecmdr
9a71644291 Merge "i2c: i2c-msm-geni: Wait for abort command completion" 2020-11-17 13:28:59 -08:00
Raghavendra Kakarla
e90ef046a6 drivers: rpmsg: rpm-smd: define readq_relaxed for ARM variants
ARM cannot natively read 64-bit address. As such the readq_ variants
are not defined for this architecture. Add a 32-bit equivalent to read 2
sequential 4-byte memory into a u64 value. Let's keep them locally
defined for now, since they are not native to the ARM architecture.

Change-Id: I9d00d0a9cd185e658d7b860cac2f59c8438e1b30
Signed-off-by: Raghavendra Kakarla <[email protected]>
2020-11-17 23:28:21 +05:30
Pooja Kumari
63b2502945 msm: ipa3: Define ipa_get_wdi_version method
Define ipa_get_wdi_version method in framework
context to get wdi version.

Change-Id: I4ba2a340bfa33eb089da40f1b7460d3395c365f4
Signed-off-by: Pooja Kumari <[email protected]>
2020-11-17 09:01:14 -08:00
Jagadeesh Kona
893c1f5b78 clk: qcom: clk-debug: Add support for debug clock API's
Add support for qcom_clk_dump and qcom_clk_bulk_dump API's
which can be used by the clients to dump the registers
associated with the clock and it's parents.

Change-Id: Iea7f30bb4e789e41dbae41b88514ffd53c136174
Signed-off-by: Jagadeesh Kona <[email protected]>
2020-11-17 08:48:25 -08:00
Rohan Sethi
48915f6884 msm: kgsl: Disable gpu_llc flags by default
Fixes inconsistency in previous change.

Change-Id: I793532e648a8c6f5db5f3bf899d56b3517e55897
Fixes: 4cc9960429 ("msm: kgsl: Disable gpu_llc flags by default")
Signed-off-by: Rohan Sethi <[email protected]>
2020-11-17 22:18:21 +05:30
qctecmdr
e915fc5948 Merge "msm: kgsl: Add a Kconfig setting for GPU idle timeout" 2020-11-17 05:57:29 -08:00
qctecmdr
c496ba6c04 Merge "arm: defconfig: Enable QRTR MHI for sdxlemur" 2020-11-17 05:57:29 -08:00
qctecmdr
fee2b06454 Merge "icc: dt-bindings: add endpoint IDs for interconnects for SM8150" 2020-11-17 05:57:29 -08:00
qctecmdr
704966b60e Merge "cnss2: Avoid suspending PCIe after QMI send get is called" 2020-11-17 05:57:29 -08:00