Commit graph

898,717 commits

Author SHA1 Message Date
Hemant Kumar
aae80a9b0f pci: msm: Add dynamic iATU config for ep config space access
It possible that EP gets PCI probe and tries to access EP config
space before driver could finish setting up PCIe device table.
Due to this race before driver could populate the config base
address in table, operation config call back from framework
tries to de-reference config base address which is NULL. Fix
this issue by dynamically configuring iATU with config space
address range mapping to the BDF for which config space is
requested for. This prevents access to pcie device table which
is used for static mapping for multiple device config space to
its BDF.

Change-Id: Ie6a83355087912369e46f028d8ffe5e4b5a5fba5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:47 -07:00
Hemant Kumar
b492f59d0f pci: msm: Use operation config read/write APIs in AER handler
AER handler is directly using raw read and write APIs to access
endpoint config space. Instead, use PCI framework provided APIs
as well as the register macros to stream line all config space
reads and writes to go through PCI read and write operation.
Also, use PCI framework APIs to find the pci device using BDF
this removes the dependency on local pci device table.

Change-Id: I5b0fa2dc6eb383d9db2dc42f026a2b6cb85b3d71
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:31 -07:00
Hemant Kumar
4ae8c3a83e pci: msm: Handle AER in threaded irq context
AER handling requires finding the source pci device on
the bus which causes the AER. Source pci device is found
using bus, device and function number. Finding pci device
requires sleeping context because bus is walked by holding
semaphore. Hence move AER handling to threaded irq context.

Change-Id: Ia51b91560326be2a85e17ce98315ea39d25641e2
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:01 -07:00
qctecmdr
eb6b3094be Merge "pci: msm: Refactor msm_pcie_confirm_linkup function" 2021-05-10 17:29:47 -07:00
qctecmdr
8b02e66e74 Merge "drivers: thermal: Snapshot of lmh cpu VDD driver from msm-4.19" 2021-05-10 07:00:10 -07:00
qctecmdr
22033f03e8 Merge "defconfig: sdmsteppeauto: Enable kenel debug flags" 2021-05-10 07:00:10 -07:00
qctecmdr
5743323a4d Merge "net: qrtr: Use cyclic idr allocator for port assignment" 2021-05-10 07:00:07 -07:00
qctecmdr
8e8bbdacf2 Merge "msm: kgsl: Avoid flooding kernel log with invalid ioctl errors" 2021-05-10 01:39:19 -07:00
Vinay Sudra
7a5cc733fe defconfig: sdmsteppeauto: Enable kenel debug flags
Enable debug flags for various kernel subsystem

Change-Id: I3e61d072a935811ecece09e45870e0e200a45bb0
Signed-off-by: Vinay Sudra <vsudra@codeaurora.org>
2021-05-09 23:48:06 -07:00
qctecmdr
8336f3edcd Merge "msm: kgsl: Expose memtype stats through sysfs" 2021-05-09 22:55:46 -07:00
qctecmdr
45a1229071 Merge "msm: adsprpc: return fastrpc ioctl call if process exit sequence start" 2021-05-08 09:42:59 -07:00
qctecmdr
899be810b4 Merge "msm: kgsl: Print the process id for the context on a pagefault" 2021-05-08 07:00:06 -07:00
qctecmdr
37c10a988e Merge "pci: msm: Use framework API to enable AER for endpoints" 2021-05-08 04:17:20 -07:00
qctecmdr
aefbccb56c Merge "slatecom-events-bridge: Add driver for events from Slate" 2021-05-08 01:30:21 -07:00
Hemant Kumar
a2a2d557fb pci: msm: Refactor msm_pcie_confirm_linkup function
For link training Data link layer, active bit is checked
in link status register of the root complex. Hence create
a new function msm_pcie_dll_link_active() to check the link
status. Use same function in msm_pcie_confirm_linkup() as well.
In order to check endpoint access use pci_device_is_present()
provided by framework. This allows all ep config space access
to go through operation config callback from framework.
Also, remove reading of root complex vendor id and device id
which is redundant now.

Change-Id: I46fdb566ed20759d38d991ceeb23703759c04ecd
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-07 10:40:57 -07:00
Hemant Kumar
9ecf13f417 pci: msm: Use framework API to enable AER for endpoints
Currently advanced error reporting is enabled by pci msm
controller driver using custom API. Since AER root port
service driver provides exported API
pci_enable_pcie_error_reporting() use this API to enable
support for AER and get rid of custom API. Framework API
needs to be wrapped under QGKI kernel config to prevent
GKI ABI breakage.

Change-Id: I3856fdc958a6234fe5e0a888733ce9f57fa5a48e
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-07 10:39:47 -07:00
qctecmdr
e9d55dd9b8 Merge "iommu/arm-smmu: sign extend iova for fault handler" 2021-05-07 10:25:17 -07:00
qctecmdr
460f85c07a Merge "defconfig: steepauto: Enable INCFS" 2021-05-07 10:25:17 -07:00
qctecmdr
9e8437a8e5 Merge "defconfig: autogvm: Enable INCFS" 2021-05-07 10:25:16 -07:00
qctecmdr
83157d9075 Merge "defconfig: gen3auto: Enable INCFS" 2021-05-07 10:25:16 -07:00
qctecmdr
34c54ac16d Merge "arm: defconfig: Enable PCI Express AER driver" 2021-05-07 10:25:16 -07:00
qctecmdr
b382f222c2 Merge "serial: msm_geni_serial: Allow clock_on/off ioctl to be optional" 2021-05-07 10:25:15 -07:00
Kamal Agrawal
547129b6ad msm: kgsl: Avoid flooding kernel log with invalid ioctl errors
For invalid ioctl inputs from user, kgsl already returns -ENOIOCTLCMD error
code. Avoid flooding kernel log with such errors.

Change-Id: Iaf9c8eb0c51b221738482e2b4b02289913a2878e
Signed-off-by: Kamal Agrawal <kamaagra@codeaurora.org>
2021-05-07 00:44:15 -07:00
Jeya R
2a98c1c02d msm: adsprpc: return fastrpc ioctl call if process exit sequence start
Added check to return fastrpc ioctl call when process exit sequence is
in progress.

Change-Id: I83915cb3fb75cc69d245a56800dcf42b492e01ea
Acked-by: Nishant Chaubey <chaubey@qti.qualcomm.com>
Signed-off-by: Jeya R <jeyr@codeaurora.org>
2021-05-07 12:18:40 +05:30
qctecmdr
dcb612382b Merge "scsi: ufs: Narrow down fast pass in system suspend path" 2021-05-06 22:23:00 -07:00
qctecmdr
ede504cedc Merge "defconfig: autogvm: Enable boot marker for KPI measurement" 2021-05-06 22:23:00 -07:00
qctecmdr
39d09dfcce Merge "usb: f_fs: Fix use-after-free for epfile" 2021-05-06 22:23:00 -07:00
qctecmdr
a5af1843ad Merge "mtd: msm_qpic_nand: Enable Pagescope read feature and reset status_desc" 2021-05-06 22:22:59 -07:00
qctecmdr
36d9ba8f4c Merge "sched/walt: consider average max_nr when compare max_nr" 2021-05-06 22:22:59 -07:00
qctecmdr
54a9c89962 Merge "icnss2: Add support for MHI state info" 2021-05-06 22:22:59 -07:00
qctecmdr
5ab7307c8a Merge "adsprpc: Map dynamic loading memory persistent" 2021-05-06 22:22:58 -07:00
qctecmdr
e3e00bfbe0 Merge "power: qcom: Add QTI QBG(Qualcomm Battery Gauging) driver" 2021-05-06 22:22:58 -07:00
qctecmdr
7b79fdc03f Merge "defconfig: Add initial defconfig fragments for scuba" 2021-05-06 22:22:58 -07:00
qctecmdr
5aeb2f7dfe Merge "PCIe: ASPM: Save/restore ASPM-L1SS controls in reverse order" 2021-05-06 22:22:57 -07:00
Ashish Kori
790ab2f4d7 serial: msm_geni_serial: Allow clock_on/off ioctl to be optional
Add support in the driver to manage power without enabling pm runtime.
UART driver gives control to user space client to vote for clock on/off
by exposing ioctls. These vote clock on/off APIs depend on PM runtime
framework for power related operations.

This change relaxes driver from depending on userspace ioctls to invoke
runtime resume/suspend for basic uart functionality which will now be
done by system suspend/resume. This will block PM framework API's and
use system suspend/resume API for UART on/off.

Change-Id: Idf0632c0e2d40907f7a226cd7e3e814d1c1f6751
Signed-off-by: Ashish Kori <akori@codeaurora.org>
2021-05-06 21:53:14 -07:00
Ajit Kumar
3f8d1181b9 slatecom-events-bridge: Add driver for events from Slate
Add driver to send and receive events from Slate
co-processor. The driver uses Glink channel to communicate
with Slate.

Change-Id: I2b7cf9a47e8947f79c7e9cd8b1311ff8c04bf848
Signed-off-by: Ajit Kumar <kajit@codeaurora.org>
2021-05-07 10:22:16 +05:30
qctecmdr
b794964c98 Merge "cnss2: Restore PCIe config space before enable PCIe device" 2021-05-06 19:07:09 -07:00
qctecmdr
ef335b8083 Merge "msm: ep-pcie: Give BAR0 and BAR2 the right size" 2021-05-06 19:07:08 -07:00
qctecmdr
03fb5fd7c5 Merge "mtd: msm_qpic_nand: Remove the SW workaround on sdxlemur" 2021-05-06 19:07:08 -07:00
qctecmdr
752f6f5a25 Merge "msm: kgsl: Update A660 variant GPU revision number" 2021-05-06 19:07:07 -07:00
qctecmdr
1d9b786a0b Merge "arm64: kexec_file: add crash dump support" 2021-05-06 19:07:07 -07:00
qctecmdr
7659c1bb0f Merge "defconfig: gen3auto: enable BPFtrace userland tools" 2021-05-06 19:07:07 -07:00
qctecmdr
824637b721 Merge "defconfig: Enable support for cpuidle for monaco" 2021-05-06 19:07:06 -07:00
qctecmdr
c8ef6a8b1c Merge "msm: veth_ipa: page fault during VETH0 bring up fix" 2021-05-06 19:07:06 -07:00
qctecmdr
a6761c3916 Merge "drivers: pinctrl: Add gpio to mpm mapping for Monaco" 2021-05-06 19:07:06 -07:00
Hemant Kumar
bb5ba33eb5 arm: defconfig: Enable PCI Express AER driver
Enable this driver to allow using standard APIs
to enable and disable AER support in endpoint
driver. In order to enable this driver
CONFIG_PCI_QTI needs to be enabled to prevent
GKI ABI breakage for GKI enabled configuration.

Change-Id: Icec7e6b10a7449d7dcf011afd73e1c573c16c8c5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-06 09:40:36 -07:00
Venkata Rao Kakani
66a40d0955 defconfig: autogvm: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA guest to support APK
updates.

Change-Id: I0c202ba7d28b7393dcb47544728f8c042137ea28
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 21:17:19 +05:30
Venkata Rao Kakani
9d079292f3 defconfig: gen3auto: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA to support APK
updates.

Change-Id: I3dda81703af139c3554993c725189215c28f386c
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 07:07:58 -07:00
Venkata Rao Kakani
ce507db597 defconfig: steepauto: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA to support APK
updates.

Change-Id: Idf3c93412d5a87c9df7ac5e88ccdc0bae114621f
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 07:07:20 -07:00
Deepak Kumar Singh
822ff8ce4c net: qrtr: Use cyclic idr allocator for port assignment
Use cyclic id allocator to avoid immediate reassignment of
same port id.

Assigning incremental port id gives more clarity over ports
assignment and makes it easy to debug problem in certain scenario.

Change-Id: Ib432ff641f4c81ba33ff0176cb67f1cdf4b3b1f9
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
2021-05-06 16:31:41 +05:30