Checking IPC log handle during usage rather than after creation.
This is because IPC logging is not available with boot image of
of GKI.
Change-Id: I81f4d5910bf721fd94f5858a2b7aba675a7be931
Signed-off-by: Karthik Poosa <kpoosa2@codeaurora.org>
SW trigger for PBS to configure ISC in LRA detection doesn't need to
pass any parameter or wait on any condition including checking status.
Hence switch using qpnp_pbs_trigger_single_event() instead of
qpnp_pbs_trigger_event() to trigger PBS.
Change-Id: I8b252e293265994976924435f8a6a11d9b463119
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
A simple PBS can be triggered by SW writing to SW_TRIGGER (bit 7) in
TRIG_CTL register without passing any parameters through SCRATCH1
register and not waiting on any condition. Also, this simple PBS is more
like a fire and forget and doesn't even need to check on the status
through SCRATCH2 register. Add support for this simple PBS through an
API qpnp_pbs_trigger_single_event().
Change-Id: I8a6448f9be8f84269c6ba5672bead01a152185ad
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Consider the following dump stack :
do_raw_spin_lock+0xf0
_raw_spin_lock_irqsave+0x80
mmc_request_done+0x48
sdhci_irq+0x954
__handle_irq_event_percpu+0x9c
handle_irq_event+0x60
handle_fasteoi_irq+0x140
__handle_domain_irq+0xc0
gic_handle_irq+0xcc
el1_irq+0x108
ktime_get+0xc0
mmc_cqe_clk_scaling_stop_busy+0x58
mmc_blk_cqe_complete_rq+0x138
mmc_blk_mq_complete+0x24
blk_done_softirq+0xe0
Here mmc_cqe_clk_scaling_stop_busy is being called from the soft irq
context and it acquires the clock_scaling lock.
Before it could unlock, a H/W irq gets triggered on the same core which
switches the context and starts execution but since lock is already held
in the softirq context, irq context ends up waiting for the same lock,
leading to a deadlock.
Use spin_lock_irqsave to avoid above explained deadlock.
Change-Id: I7684f4e349648414038cd6601cca58ac11b9409b
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Signed-off-by: Ram Prakash Gupta <rampraka@codeaurora.org>
This change enables Incremental FS as module for holi.
Change-Id: Ie18a8877ed601197312adc3b6782d0b0e1f663d8
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
There is a race between soc wake release in event queue
and soc wake request called from driver. Due to which
ref count is not updated properly and results in number
of soc wake release send to FW is more than number of
soc wake request. Fix it by atomically incrementing
ref count.
Change-Id: I1e134af8a1170d804aeaea53ea6bd288bbcb42b8
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Do not reserve TCS iomemory, Access TCS register
and remap it using devm_ioremap.
Change-Id: I21fef89af38ec3a5ad110947c1a5adf590c4f2d6
Signed-off-by: Mahesh Kumar Sharma <smahesh@codeaurora.org>
Set default value of flags gpu_llc_slice_enable and
gpuhtw_llc_slice_enable to false and disable change
via sysfs nodes.
Change-Id: I1446a04b25a793cdebf5428de2e84870a6b33b7c
Signed-off-by: Rohan Sethi <rohsethi@codeaurora.org>
Request ipcc irq with irqf no suspend flag.
This is required as to handle IPCC interrupt,
during suspend phase.
Change-Id: I5c34c5d446bd2cc2187550455071f35637a2c4b3
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
Send power save enter/exit via SMP2P instead of QMI.
Change-Id: I8aeeab3efd2f7c39e4e7ac134af98c58827ff6d5
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
If the sbi->ckpt->next_free_nid is not NAT block aligned and if there
are free nids in that NAT block between the start of the block and
next_free_nid, then those free nids will not be scanned in scan_nat_page().
This results into mismatch between nm_i->available_nids and the sum of
nm_i->free_nid_count of all NAT blocks scanned. And nm_i->available_nids
will always be greater than the sum of free nids in all the blocks.
Under this condition, if we use all the currently scanned free nids,
then it will loop forever in f2fs_alloc_nid() as nm_i->available_nids
is still not zero but nm_i->free_nid_count of that partially scanned
NAT block is zero.
Fix this to align the nm_i->next_scan_nid to the first nid of the
corresponding NAT block.
Change-Id: Ib979f5529a531ee6f4960eaadebc4d7340317bf5
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
VM has to go into suspend state outside of use case boundary. Delay in
transitioning to system suspend or spurious wake-ups after the use case
is completed will result in a system regression.
Adding a mechanism to track both the scenarios of delay in system
suspend and spurious wake-ups of the VM by checking the VPM Group state
associated with the VM.
Change-Id: I2a5990989033ffd3cc57ae1cba93b8ba6b63a3c7
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
Explicitly memset struct to zero before sending
to userspace. This is to prevent padded bytes
from possibly leaking kernel memory contents to
userspace.
Change-Id: Id3e873164430c34195344884b2899e61aa060dfc
Signed-off-by: Abir Ghosh <abirg@codeaurora.org>
This is a squash of below two minor fixes:
8fec754f57a8 mmc: cmdq: trigger get queue status after dcmd
327fd3225911 mmc: cqhci: CQ Register changes for v5.0 onwards.
Change-Id: I1bb6cae5a647c4ea189a992d5ace7b6c1e3a1c87
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Modify the sequence of ETR disable，drvdata->mode is set to
CS_MODE_DISABLE before calling usb_qdss_close().
Change-Id: I575867cee95f4db5ba155a2619ab1eca954d6387
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
If device is boot up by rtc alarm, the alarm irq will still be
enabled and the alarm time is smaller than current rtc time before
any alarm is set or canceled. If device is powered off now, it will
boot up automatically as the alarm irq is enabled.
So disable alarm irq if alarm is enabled and alarm time is in the
past.
Change-Id: I53dc7cdb1fa7c56eea07ed01d1f6cb63f0bb8a8d
Signed-off-by: Guixiong Wei <guixiong@codeaurora.org>
Configure flush and reset cti trigger number in device tree.
Replace configuring cti trigger number by hard code since some
platforms don't have same cti trigger number.
Change-Id: Ib26802b3bd3449566954752b100d6ea188e98e13
Signed-off-by: Tao,Zhang <taozha@codeaurora.org>
