Add support for parsing EMMC specific crypto engine type
in crypto qti tz driver.
Test:
Device booted upto UI with File Based Encryption enabled.
Change-Id: Id6354e69dc32a2c68ba81450e8a9c0e015779f4f
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
cnss_bus_update_uevent() API added, to notify CNSS platform
information to CLD driver.
Change-Id: I7c26c9df91e0c1e8fd02c6d6ab64b932bd11b4dd
Signed-off-by: Lin Bai <lbai@codeaurora.org>
Add support for display clock controller for display related
clock clients to be able to request for the clocks in monaco.
Change-Id: I82e277131f98b2d6641d77958413e1f71ef74640
Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
It is possible that number of commands to be send can exceed
MAX_RPMH_PAYLOAD.
This change adds error checking for such case.
Change-Id: I9c05bf3befd6590fee4625230bb44d7711c625a7
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
Add NTN3 setup info struct to enable NTN3
IPA offload.
Change-Id: Idb8399fa7574dc7ac3b4c119c40b441bfa28793d
Signed-off-by: Amir Levy <alevy@codeaurora.org>
The CPU mux requires to vote correctly on the supply during the
frequency transitions, thus add the pre/post callback hooks which would
enable & set voltage vote on the rail.
Change-Id: I0d4bb88e8d319bfc3f4f8d682964eb7ff3719ce0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
MMU Mapping uses short descriptor mapping on v7 targets and long
descriptor mapping for v8 targets. We have concept of NS shared
cache lines for long decscriptor mapped targets which means no
cache maintenance is required for those.On MDM targets, we use short
descriptor mapping due to low memory constraints and hence the cache
line is not shared and explicit cache maintenance is required. Add
shmbridge flush and invalidate operations inside smcinvoke driver for
MDM targets so as to ensure proper cache maintenance is done.
This change also removes some redundant code and refactors it for
better readability and lesser loc.
Change-Id: Id8216c5247b0584c26f85c08899df16db7f0dc0a
Signed-off-by: Anmolpreet Kaur <anmolpre@codeaurora.org>
For MDMs, LEVMs and targets other than MSMs, we might not
need to register memory as large as 4M for shmbridge.
This change helps to decide the shmbridge pool size according
to the dtsi entry of the target.
Change-Id: I8f6905b5793f2dbe69f269a05cbbe74855eab708
Signed-off-by: Anmolpreet Kaur <anmolpre@codeaurora.org>
set ready and error states for btsss and dspss properly.
define buffer size to hold the bt and dsp state.
Change-Id: I5fd8378547efe730ca2094a44039ff1d6e28ec1d
Signed-off-by: Praveen Koya <pkoya@codeaurora.org>
This enables rpmh master stats driver to get different subsystem's
statistical information.
Change-Id: I2689aa8887e8b1308827db8155acc4aad81240f7
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
