if there is a NACK from i2c slave side on the bus while doing i2c
transfer, report it as an error. So far NACK reproted at i2c master
just as an error and if master is done with the command to GENI, it
considered as a success. Ideally the NACK or ACK is part of protocol,
here we are returning NACK as an error for the client to take some
respective action.
Change-Id: I084f8f733310f7a10f2d53f34d9c99f6c5234406
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
In cases where the PCIe enumeration fails after enabling LTSSM
in HLOS, we need to set ltssm_en bit properly in order for
subsequent enumeration to go through. This change unsets the
ltssm_en bit in case of link failure.
Change-Id: Ic179f1bbc88523345566c1afa78e5218c872b556
Signed-off-by: Nitesh Gupta <nitegupt@codeaurora.org>
Currently the MHI logs are not unique for channel and ring ids.
Post this change, all channel ids can be found with ch_id:xx and
all ring ids can be found with ring_id:yy in MHI logs, thus making
the debugging process easier.
Change-Id: I6352911814795792f796b2062da6465da7af89ff
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Currently there is a fault in implementation of function suspend
and resume in f_cdev. In case when function suspend is issued
by the host and then cleared, still cser_resume is not being
performed. This is due to incorrect handling of if else
condition in usb_cser_func_suspend. Fix this by adding
proper handling.
Change-Id: I4f0e4c6c02d4b30f2fe0b67bc39a4fac9dbf96f1
Signed-off-by: Rohith Kollalsi <quic_rkollals@quicinc.com>
Add code to show firmware capability as part of debug stats.
Change-Id: I1048b8ec3a2b43f83d961c0154fc9da0b4be2792
Signed-off-by: Mohammed Siddiq <quic_msiddiq@quicinc.com>
To avoid truncation and to show correct ubi sysfs show attribute
values, use PAGE_SIZE as a buffer size value.
Change-Id: I4cf84967437b7baae0f10f00fd3d8726f780af16
Signed-off-by: Pradeep P V K <quic_pragalla@quicinc.com>
Replace pr_err logs with mhi log support present in mhi-dev driver.
Added separate buffer logging support for MHI IPC error logs.
Change-Id: I10e39fabc8574ccfc507a8b1d34d25e9ab78265a
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Update the logs and comments in mhi_dev_process_ring.
Change-Id: Ia082911edeb79293d33f82a5001ce99eee4e746d
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Adding check for mhi_ctx and mhi_ctx->pdev in mhi_dev_open_channel API
which is called by the clients. This prevents the device crash when
mhi_dev_open_channel is called in PCIe RC configuration or when it is
called when mhi_ctx is not created yet.
Change-Id: Ic1737fa1090c06153b0638014f014ec7c1ca2903
Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>
ELBI access after D3 cold (perst assertion) is not recommended
as could be REFCLK is off.
Change-Id: I198c984c09321e9f3a4583aa3a2ca8cfe2849fbd
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
Expose remote cdsp status attribute to know
the cdsp device availability.
Change-Id: I5f13f0e8b0c46bb23c9e32531e5c6bf3d00b22df
Signed-off-by: Swathi K <quic_c_kataka@quicinc.com>
Higher bandwidth vote from client is resulting in overflow
in 32-bit mode, so limit the max frequency to INT_MAX.
Change-Id: Ic36da4a1797a91db5f840ba444b8d6ea63b96a49
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
For haptics module with HAP_PTN_V2 revision, the HW would only read 1
valid byte in every 4 bytes if the 1-byte FIFO write clashes with the
FIFO read operation. To avoid this, don't use 1-byte write but just
pad zeros at end of the pattern to keep the samples 4-byte aligned
and always use 4-byte write for FIFO programming.
Change-Id: I3ebde0fe7378c0dcffb5c51e15e6ffaae5af3e29
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Added IPA-5.2 version support in header files.
Change-Id: I47f2ab4205eeb6875d755152ff7153c5256bdf93
Signed-off-by: Raghavendar rao l <quic_rlomte@quicinc.com>
Using channel mutex lock while accessing channel specific lists,
event_req_buffers and flush_event_req_buffers. This will avoid any
synchronization issues for these lists. Previously two different mutex
locks, global MHI lock and channel lock are used while accessing these
lists.
Removing MHI spin lock while accessing the above lists in
mhi_dev_process_reset_cmd, mhi_dev_queue_transfer_completion and
mhi_dev_flush_transfer_completion_events APIs as they are already
protected by channel mutex lock obtained from the APIs that are
calling these three APIs.
Removing MHI spin lock in mhi_dev_event_msi_cb and adding channel mutex
lock. In other instances where these lists are accessed they are already
protected by channel mutex lock.
Change-Id: I58b673be452a942ff946e07f17c96a0715805621
Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>
With the commit <1528bbe6b5> ("msm: mhi_dev: Keeping event req
memory without clearing in close channel"), we are avoiding freeing
of ereq memory in close channel API. New memory is not created again
as part of start/open channel since it is not released while closing
the channel. Idea is to hold the allocated memory and avoid
reallocating every time.
But during the reset command we are freeing some of the ereqs which we
need to hold without releasing.
This change avoids freeing of ereq memory as part of reset channel
command and adds the ereqs to the event_req_buffers list. This ensures
that the lists, event_req_buffers and flush_event_req_buffers are
updated with valid ereqs.
Change-Id: Ie29962f2bc8ef5a0c193d13a13118ae9b6044c0b
Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>
Check pcie channel status before call the close channel API, only
closed it when it in open state.
Change-Id: Ib3bee9575edfae0cc907baee4956d6e3a6c78d61
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Start channel commands from MHI Host are given for all the set of valid
channels during the initialization itself. Previously we are allocating
ereq memory as part of start channel command. But, many of these channels
may not be opened by the clients and the ereq memory allocated is not
useful here.
Here avoiding ereq memory allocation during start channel command and
allocating memory only as part of open channel call by the clients. This
will reduce the overall memory usage and avoid the memory allocation
failures.
Change-Id: I60eccd1d17c60e1108820e1532f2ae385455f336
Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>
With commit 8c194abb0e ("input: qcom-hv-haptics: delay hBoost turning
off"), the hBoost would be kept as enabled in the 2 seconds after stopping
play. If a new play is triggered in that 2 seconds, the hBoost will be
considered as working in open-loop mode so configure haptics open-loop
drive in such case.
Change-Id: Ibfa533f23a52bd609e2a8564f859ca8835a8fd67
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Performance counter values need not be retained across contexts unless
specifically requested for debug. Zap the counters by initialising
perfcounter SRAM with 0's using GPU_RBBM_PERFCTR_SRAM_INIT_CMD.
Add pm4 packets during context switches and add a KMD postamble packet to
clear the counters during preemption. Do not enable perfcounter save and
restore unless requested.
Change-Id: I371779ce659c07a1cc664327f5ecdcf0374201d8
Signed-off-by: Mohammed Mirza Mandayappurath Manzoor <quic_mmandaya@quicinc.com>
Signed-off-by: Harshitha Sai Neelati <quic_hsaineel@quicinc.com>
This reverts commit b515d2637276a3810d6595e10ab02c13bfd0b63a.
Commit b515d2637276a3810d6595e10ab02c13bfd0b63a ("xfrm: xfrm_state_mtu
should return at least 1280 for ipv6") in v5.14 breaks the TCP MSS
calculation in ipsec transport mode, resulting complete stalls of TCP
connections. This happens when the (P)MTU is 1280 or slighly larger.
The desired formula for the MSS is:
MSS = (MTU - ESP_overhead) - IP header - TCP header
However, the above commit clamps the (MTU - ESP_overhead) to a
minimum of 1280, turning the formula into
MSS = max(MTU - ESP overhead, 1280) - IP header - TCP header
With the (P)MTU near 1280, the calculated MSS is too large and the
resulting TCP packets never make it to the destination because they
are over the actual PMTU.
The above commit also causes suboptimal double fragmentation in
xfrm tunnel mode, as described in
https://lore.kernel.org/netdev/20210429202529.codhwpc7w6kbudug@dwarf.suse.cz/
The original problem the above commit was trying to fix is now fixed
by commit 6596a0229541270fb8d38d989f91b78838e5e9da ("xfrm: fix MTU
regression").
Change-Id: Iefabad76eb1870f74b819f45e9d3a51cbc94549c
Signed-off-by: Jiri Bohac <jbohac@suse.cz>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Git-commit: a6d95c5a628a09be129f25d5663a7e9db8261f51
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
Signed-off-by: Sharath Chandra Vurukala<quic_sharathv@quicinc.com>
Use UBI_MAX_VOLUME_NAME length for printing ubi volume names
to avoid truncation of ubi volume name fields.
Change-Id: I0ab4577dcc1e4bb93d2bcef1b8e52da98f13ff15
Signed-off-by: Pradeep P V K <quic_pragalla@quicinc.com>
Performance counter values need not be retained across contexts unless
specifically requested for debug. Zap the counters by initialising
perfcounter SRAM with 0's using GPU_RBBM_PERFCTR_SRAM_INIT_CMD.
Add pm4 packets during context switches and add a KMD postamble packet to
clear the counters during preemption. Do not enable perfcounter save and
restore unless requested.
Change-Id: I371779ce659c07a1cc664327f5ecdcf0374201d8
Signed-off-by: Mohammed Mirza Mandayappurath Manzoor <quic_mmandaya@quicinc.com>
Signed-off-by: Harshitha Sai Neelati <quic_hsaineel@quicinc.com>
