sync_file_create increases refcount of fence, so need release dma fence
handler after it.
Change-Id: I3cc60d6a7e8a32138bfee611864cee00c2ac7dd3
Signed-off-by: Kasin Li <donglil@codeaurora.org>
In fs_ready_store(), only dereference plat_priv pointer after NULL
check.
Change-Id: I222139d02a8cc8aef19e2ff879a953977896a08c
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Currently the driver requires pwr_evt_irq to be compulsorily
passed from DT unless the core is dual port. Now consider a core
that does not allow SSPHY autosuspend during operational mode,
instead allowing it only as a part of dwc3_msm_ssphy_autosuspend.
As soon as autosuspend is enabled, there is a chance that
pwr_evt_irq is fired with IN_P3 bit set. Although the driver will
be marking mdwc->in_p3 in the pwr_evt_handler, it will fail to
see IN_P3 bit to be set(because it has been cleared in handler)
during the 5ms wait time in the ssphy_autosuspend function and
prepare_suspend will again set mdwc->in_p3 to 0. This leads to
failure of runtime/system suspend.
Fix this by not passing pwr_evt_irq from DT for the cores which
disable SSPHY autosuspend.
Change-Id: I85ca7e45337fe35c570d163766e7638e11537201
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
F_FS function driver allocated ffs_eps and updates ffs_ep->ep
to corresponding usb_ep during func->bind and never clears it.
On bind it also saves ffs_ep context in epfile->ep.
During func->disable, it clears only ffs_ep context in epfile->ep
and on func->unbind it frees ffs_eps memory.
ffs_epfile_io routine currently relies on ffs_ep->ep (which is
never cleared and ffs_ep could be freed on unbind) to detect any
disconnect during active IO. This can result in various issues e.g.
use after free use of ffs_ep if unbind finished before epfile_io
could resume or "stop adbd" trying to dequeue a freed USB request
when epfile_io could execute only after F_FS got disabled as
'if (ep->ep)' check would be TRUE.
Fix this by checking stored ffs_ep context against latest epfile->ep
to figure out if endpoint got disabled or changed before acquiring
spin_lock.
Change-Id: I6bdcdf0dff0813ed7b2af8c24f544a22796b0369
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Porting the FDE functionality from msm-4.14 branch commit
<b8f1b6a6> (Add support for block disk encryption).
Modified to be compatible with the 5.4 Kernel.
Test:
1. Basic_SimpleEncryption.
2. ModifyEnforcedFiles_FileCreationWithinEnforcedFolder.
3. PIN, pattern, password.
4. Verified filename encryption.
5. Generate/set ICE keys.
6. Enable ICE state for userdata partition.
7. Format the userdata partition.
8. Check if partition is encrypted via ICE.
Change-Id: I307d75b7cdf25f7a9ad2b4f948e64d13278e6f03
Signed-off-by: Neeraj Soni <neersoni@codeaurora.org>
Signed-off-by: Victor Zaharchuk <vzaharch@codeaurora.org>
Different GPU can have a different GMEM size so need to configure
UCHE GMEM base address accordingly. Having a fix base as 0x100000
results in RB and UCHE GMEM range overlap on GPUs with GMEM size >1MB.
Also, adjust SVM 32bit base based on GMEM UCHE range end to prevent
GMEM UCHE and SVM 32bit range overlap.
Change-Id: I41330a33b79bf8c79b593ecd89593a796230b074
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
The version numbers shall be copied into the local variables for
any potential version comparison.
Change-Id: I08ac6359df0890a2605dbb6279b73abe09060ec8
Signed-off-by: Yong Ding <yongding@codeaurora.org>
The prink() could consume enough CPU when the retry eventually takes
a lot of times before it could succeed.
Change-Id: I4f49d0650ee3ae06700d2ce592acd0532bbf38cd
Signed-off-by: Yong Ding <yongding@codeaurora.org>
Currently power_role is accessed by set_prop and get_prop
functions of typec_power_role without any locking mechanism,
there can be a scenario where both function calls were invoked
simultaneously and power_role variable is not correctly
updated, and it leads to enumeration issues when connected to PC.
Fix it by adding locking mechanism to power_role.
Change-Id: I4f5dc38a9536b535510dc2b112712a5cbd2b3f84
Signed-off-by: Kavya Nunna <knunna@codeaurora.org>
Currently CNSS2 driver does not support multi chips. This is a update of
the CNSS2 driver to support multi chips with converged dts.
Change-Id: Ie3efb526220c2de21e021320322d46c345d770bc
Signed-off-by: wei yang <yangwei@codeaurora.org>
Signed-off-by: Kuichu Ni <kuichun@codeaurora.org>
Remove all the leading and trailing whitespaces in the string copied
from userspace.
Change-Id: I627416dcdb1155303ad6a8ed172910a8653dd67b
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
On certain platforms, due to a HW issue, the SSPHY keeps
transitioning in and out of p3 whenever we perform any HS
transfers. This leads to a storm of PWR_EVNT irgs.
Fix this by disabling SSPHY autosuspend on such platforms.
Autosuspend will be enabled as part of dwc3_msm_prepare_suspend
so that SSPHY gets a chance to go into P3.
Change-Id: I4e674f780a72a8c4abcb3e6c9f083f23b1faa196
Signed-off-by: Aniket Randive <arandive@codeaurora.org>
In line with the sequence for primary port, update proper fields
of DWC3_GUSB2PHYCFG and DWC3_GUSB3PIPECTL registers for the
second port of the dual port controller. Update other registers
as required.
While at it, also avoid enabling SSPHY autosuspend if
dis_u3_susphy_quirk is set.
Change-Id: Ib79dba4c6d854fa2bf33a1b7cecf06f988250662
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Signed-off-by: Harsh Agarwal <harshq@codeaurora.org>
Certain targets may have a dual port capable host controller.
Add support for the PHY IRQs for the second port. Since the SSPHY
autosuspend will be disabled for such controllers, remove the
support of pwr_evnt_irq as a mandatory IRQ and allow SSPHY to go
into P3 as a part of suspend sequence. Handle the logic
gracefully to maintain single port controllers.
Change-Id: I5a53d6e23f64bec7ae940d23923df310309a28da
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Signed-off-by: Harsh Agarwal <harshq@codeaurora.org>
Add 2 new PHY instances (HS and SS) in dwc3 and dwc3-msm
structures. Probe and initialize them when the controller is
dual port capable. This capability is advertised by cores
supporting only host mode using the DT flag 'qcom,dual-port'.
Update PHY1 flags wherever applicable while maintaining single
port controller support.
Avoid workaround of SSPHY powerdown as a part of HS device
connect because of the known HW issue of the other SSPHY going in
and out of P3 when data transfers are being done.
Change-Id: If52fd6383cc2da8b763c774d2ad688448f90aea0
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Signed-off-by: Harsh Agarwal <harshq@codeaurora.org>
