Free QDSS memory on every SSR and allocate it again
when QDSS trace memory indication is received from FW.
Change-Id: I1f4ed9dbfc597407992d2484deaf3767ce0d6c3c
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Enable QSEECOM,QRNG,smcinvoke config as modules.
Also enable the QTI crpto tz driver config, needed to enable
QTI inline encryption and disable HWKM as this is not
supported on HW.
1.CONFIG_QSEECOM=m
2.CONFIG_HW_RANDOM_MSM_LEGACY=m
3.CONFIG_QCOM_SMCINVOKE=m
4.CONFIG_QTI_CRYPTO_TZ=m.
Change-Id: Ie8730f1ab025d75ecbaf7c6937323e12b9438530
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
Some of the SoCs may not have support "rmb_general_purpose" register,
So handle the error path to load the firmware from kernel.
Change-Id: Id64c8e531bb6fe79ea40e6fa34b20aa2e1891ad8
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
DWC3 XMIT_DEV command is timing out for USB function wakeup functionality
with current 500 iterations (i.e. timeout comes around 300us). USB DWC3
controller shall take more time to process this particular command. Hence
increase retry count from 500 to 3000 iterations (i.e same as dwc3 endpoint
command timeout value) to have sucessful USB function wakeup functionality.
Change-Id: I1b5a9dd64a01ad9592a04c275beef77eaee523be
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Set parent of touch device so that sysfs path to be
used by TUI App is proper.
Change-Id: Ibb714151a2dcb6789428fdb0a9759a86568cd135
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Some devices which support disable cpu0 can not disable cpu0,
so add psci_cpu_can_disable() function to make all cpus can
disable.
Change-Id: Iaed4129abfc1283c6371bc11bbe5ae4e66317280
Signed-off-by: Teng Fei Fan <tengfei@codeaurora.org>
Add the MIDR part number info for the Arm Cortex-A78.
Change-Id: I0ce8b2d01f95318ce7a2fc4c389a17400f74d36e
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Add the MIDR part number info for the Arm Cortex-A77.
Change-Id: I874c4e94bfe26c0623215b329332536f5dc064ff
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20201028182839.166037-1-robh@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Git-commit: 8a6b88e66233f5f1779b0a1342aa9dc030dddcd5
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Commit 297883f142 ("msm: kgsl: Dump HLSQ_DBG_CNTL in snapshot")
added extra register “0xD004” which does not exists. Remove this
register to have only required registers in snapshot dumping.
Change-Id: I6dcdf6b0fdbcc89ac6854bd1b8a7d20cd375f621
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
This change will add sfe support for the target.
Change-Id: Ied8407aa928efe17ae4b7735af0e66afd7891e06
Signed-off-by: Aman Gupta <amangupt@codeaurora.org>
Increase QMI and MHI default timeouts for emulation builds. Also
set timeout for MHI power on as multiple default timeout value
instead of a fixed number so that it can be changed at runtime
for debug purpose.
Change-Id: I483a458f54083644f9acd2a484243016901c4776
Signed-off-by: Yue Ma <yuem@codeaurora.org>
