qctecmdr
d79d19d3db
Merge "ARM: dts: msm: add change to support gsi wdi polling"
2020-10-09 19:37:36 -07:00
qctecmdr
2cbd3c1429
Merge "ARM: dts: msm: Added pil nodes for sdxlemur"
2020-10-08 21:56:15 -07:00
qctecmdr
6363014c95
Merge "ARM: dts: msm: remove cpu7 llcc-ddr lat device node"
2020-10-08 21:56:15 -07:00
qctecmdr
4a7dba964b
Merge "ARM: dts: msm: Add board device-tree files for SDXLEMUR target"
2020-10-08 21:56:15 -07:00
qctecmdr
d09a2f82d5
Merge "ARM: dts: msm: Add debugcc and APSSCC clock nodes for sdxlemur"
2020-10-08 21:56:15 -07:00
qctecmdr
2c97d45b55
Merge "ARM: dts: msm: Enable smcinvoke and shmbridge on shima"
2020-10-08 21:56:15 -07:00
qctecmdr
48c44b3121
Merge "ARM: dts: msm: Update CNSS node for BT GPIO config"
2020-10-08 15:24:51 -07:00
qctecmdr
e4a4f40566
Merge "ARM: dts: msm: add WL_EN entry in BT node"
2020-10-08 15:24:51 -07:00
qctecmdr
f6b7ab2eea
Merge "ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina"
2020-10-08 15:24:51 -07:00
qctecmdr
eeaa3ab6a5
Merge "ARM: dts: msm: Add ufs dt node for yupik"
2020-10-08 08:33:22 -07:00
qctecmdr
e405fac1a5
Merge "ARM: dts: msm: switch off kpti on holi"
2020-10-08 08:33:22 -07:00
qctecmdr
92e0f5e432
Merge "ARM: dts: qcom: disable panic on single corruption"
2020-10-08 08:33:22 -07:00
qctecmdr
875c93b2c8
Merge "ARM: dts: msm: Add focaltech touch support on holi cdp"
2020-10-07 12:10:23 -07:00
qctecmdr
65d5a4cbbe
Merge "ARM: dts: msm: Add new DT entry for wan agg pkt size"
2020-10-07 12:10:23 -07:00
qctecmdr
7086300399
Merge "ARM: dts: msm: Update L12C min and init voltage on shima"
2020-10-07 12:10:23 -07:00
Melody Olvera
e898f321ee
ARM: dts: msm: Added pil nodes for sdxlemur
...
Added entries for pil modem nodes on sdxlemur.
Change-Id: I9d211a0b0b6d319066bcef5b567ef4122b6c7712
2020-10-07 10:40:30 -07:00
Ram Prakash Gupta
bed0f928ea
ARM: dts: msm: Add ufs dt node for yupik
...
Add ufs dt node support for yupik.
Change-Id: I4585ba80587f7c3e668621d98e4603008dd17f0c
2020-10-07 19:54:35 +05:30
Melody Olvera
fc85feeaf1
ARM: dts: msm: Add board device-tree files for SDXLEMUR target
...
Add devicetree files for various boards available on SDXLEMUR target.
Change-Id: Iacd1cbd4260e978387101f95954776fab7e3f042
2020-10-07 19:41:04 +05:30
Anmolpreet Kaur
2169a31b58
ARM: dts: msm: Enable smcinvoke and shmbridge on shima
...
Add the device tree entries for smcinvoke and shmbridge
on shima vm.
Change-Id: Ied6246edcdd957e18678e18c375fa11ccf4ca135
2020-10-07 10:38:31 +05:30
Ashok Vuyyuru
444e86b9fc
ARM: dts: msm: Add new DT entry for wan agg pkt size
...
Add new DT entry for wan agg pkt size.
Change-Id: I492d8f770df5c5b5d8aef2c27e31e526bbf666f1
2020-10-06 23:47:52 +05:30
Ilia Lin
8bac49cbfd
ARM: dts: msm: Add ipa_hw support for SDXLEMUR
...
Add gsi and ipa_hw support to SDXLEMUR device tree.
Change-Id: I763072bebe62be18a70ea92118596d5d59cf6261
2020-10-06 10:54:40 +03:00
Santosh Mardi
088a58f39c
ARM: dts: msm: remove cpu7 llcc-ddr lat device node
...
Remove cpu7 llcc-ddr lat device node which is similar to
latfloor defined already.
Change-Id: I7b1102b1e739b9f5325a561e0e122ae2a30f88f8
2020-10-05 09:29:54 -07:00
Ritesh Kumar
86d6a098db
ARM: dts: msm: Add focaltech touch support on holi cdp
...
This change adds focaltech touch support on holi cdp
which is needed for 120Hz video and command mode panels.
Change-Id: I03cb8927faeec77cf0af9268d3000f5b3ff75fc3
2020-10-05 13:10:23 +05:30
Mahesh Kumar Sharma
28bd21b3b5
ARM: dts: msm: add WL_EN entry in BT node
...
Add WL_EN GPIO entry in BT device tree node
to handle AON LDO fully discharge issue.
Change-Id: I526d42fb58fef7942280c4fc06ded5a47f7277dd
2020-10-04 21:08:32 -07:00
Naveen Yadav
ef5e34c083
ARM: dts: msm: Add debugcc and APSSCC clock nodes for sdxlemur
...
Add debug clock controller node to use the debug clock controller
driver for measuring the clocks, also add MCCC and CPUCC device
phandle reference to debugcc node to map register space for the
apcs diag register.
Update apsscc clock node to enable cpu driver for sdxlemur.
Change-Id: Iba7b60463462ab8e121b6a72323f1d9a116fe411
2020-10-05 09:23:30 +05:30
qctecmdr
90f273e662
Merge "ARM: dts: msm: Update modem mitigation threshold for lahaina"
2020-10-03 15:19:05 -07:00
qctecmdr
eec6bd6732
Merge "ARM: dts: msm: reserved memory for yupik"
2020-10-03 04:38:39 -07:00
qctecmdr
bd34367c9b
Merge "ARM: dts: qcom: enable display on trusted vm for shima"
2020-10-03 01:44:45 -07:00
qctecmdr
a0bbc38815
Merge "dt-bindings: mtd: Add Documentation for qpic nand"
2020-10-02 22:58:42 -07:00
qctecmdr
187c085dac
Merge "ARM: dts: msm: Add Qpic Nand support for sdxlemur"
2020-10-02 22:58:42 -07:00
Manikandan Mohan
849a444362
ARM: dts: msm: Update CNSS node for BT GPIO config
...
QCA6490 requires synchronization between BT and WLAN GPIOs for PMU
power up. Update CNSS device tree node for BT GPIO config.
Change-Id: I0cd7050dad499378ec6d2bcfbe9d78f4a79a3384
2020-10-02 18:51:20 -07:00
qctecmdr
82c8555c8a
Merge "ARM: dts: msm: Disable wakeup capability for soundwire gpio"
2020-10-02 18:08:53 -07:00
qctecmdr
40571101a5
Merge "ARM: dts: msm: Add emergency skin rule for lahaina"
2020-10-02 18:08:53 -07:00
Ram Chandrasekar
e42382f4e1
ARM: dts: msm: Update modem mitigation threshold for lahaina
...
Update modem mitigation threshold and hysteresis for lahaina as per
recommendation.
sensor mdmss-1-step/mdmss-2-step
algo_type step_wise
polling_delay 0
passive_delay 0
trip 0 2
set_temp 95000 98000 105000
clr_temp 3000 2000 5000
device modem_tj modem_tj modem_tj
upper_limit 1 2 3
lower_limit 1 2 3
Above is the new updated configuration.
Change-Id: I6eddbe2ab29fb9942cdd608b1bd507fd9aa1c910
2020-10-01 13:20:25 -07:00
qctecmdr
48cdc2ab67
Merge "ARM: dts: msm: add initial support for hw memlat devices"
2020-10-01 08:54:08 -07:00
qctecmdr
f3859d7fbe
Merge "ARM: dts: msm: Remove interconnect phandles from clock nodes"
2020-10-01 08:54:08 -07:00
qctecmdr
81052fc7a4
Merge "ARM: dts: msm: increase vm log buf size for lahaina"
2020-09-30 20:54:39 -07:00
Raghavendra Rao Ananta
16c6dbef27
ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina
...
It is possible that the DDR bandwidth requirements are not
met during modem SSR. Hence, explicitly vote for DDR turbo
frequency during modem PIL.
Change-Id: I5134feaf593673beb8bbdafc416814a5d41fb47b
2020-09-30 14:51:38 -07:00
Krishna Manikandan
7426a38f9b
ARM: dts: qcom: enable display on trusted vm for shima
...
Enable display on trusted vm for shima target
by including display dt files.
Change-Id: I5fd30dd9c84f8f8c640eaa9e2b64039f14811d32
2020-09-29 22:29:45 -07:00
qctecmdr
17594c2781
Merge "ARM: dts: msm: Add cnss-enable-self-recovery flag for lahaina"
2020-09-29 10:33:05 -07:00
qctecmdr
95628cfdf2
Merge "ARM: dts: msm: New touch node for Lahaina CDP"
2020-09-29 10:33:05 -07:00
qctecmdr
d592d62e5b
Merge "ARM: dts: msm: Correct name of funnel merg on holi"
2020-09-29 10:33:05 -07:00
qctecmdr
076019e354
Merge "ARM: dts: msm: Update focaltech enteries on lahaina qrd trustedvm"
2020-09-29 10:33:05 -07:00
qctecmdr
beb70601a6
Merge "ARM: dts: msm: Update focaltech enteries on shima trustedvm"
2020-09-29 10:33:05 -07:00
Sarthak Garg
106b6d861a
ARM: dts: msm: Add Qpic Nand support for sdxlemur
...
Add QPIC NAND Controller support for sdxlemur in device tree.
Change-Id: I411d63c2b0c9aed2f43dcdc5a05d6527ca97d01b
2020-09-29 14:18:03 +05:30
Yuanfang Zhang
ac90a3a711
ARM: dts: msm: Correct name of funnel merg on holi
...
Correct name of funnel merg to "coresight-funnel-merg" on holi.
Change-Id: If4c7d688f333f6b2d75e6570f40a1b401fefe55a
2020-09-29 15:47:39 +08:00
Harshal Ahire
1b22711353
ARM: dts: msm: add is-always-on flag to fix HS LPI issue for holi
...
Added is-always-on flag to skip the audio_hm vote during bootup
and to vote/unvote during swrm_runtime_suspend and swrm_runtime_resume.
Change-Id: Ifce00a198056590a3de7076c17b3c9f45a30fbc7
2020-09-29 12:27:09 +05:30
Fei Mao
72ce8f6e3a
ARM: dts: msm: New touch node for Lahaina CDP
...
Add Synaptics touch node for qsync wqhd panel on Lahaina devices.
Change-Id: I0fb7c9cdbcedb0ddd693fd62cd0b64a928327e77
2020-09-29 14:21:33 +08:00
Vatsal Bucha
5af4bbe1c8
ARM: dts: msm: Disable wakeup capability for soundwire gpio
...
Disable wakeup capability for soundwire gpio to avoid frequent
wakeup during power collapse. Also register wakeup event listener
as part of tx macro.
Change-Id: I20367d0c7798a76eaebfaf3a5e00db78abca72fa
2020-09-29 10:32:14 +05:30
Ram Chandrasekar
c3414b4362
ARM: dts: msm: Update core isolation and hotplug threshold for lahaina
...
Update core isolation and hotplug threshold for silver CPUs to 110C
and 112C. Update core isolation and hotplug threshold for gold and
gold plus to 108C and 110C.
Change-Id: Id7d883e751a773869dea9f320e7f055da7584a69
2020-09-28 14:57:20 -07:00
