USB secondary clocks and pm8008 clocks are not registered with the
clock framework, hence update these clocks to measure only.
Change-Id: I134119cb4ae5ef372aaaa81e6b56ffd68387985d
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Add and remove headers which are missing and additionally added
to resolve compilation issues.
Change-Id: I2bdc34a33c13f84916d4e7570c579bfc2b1e9c98
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
The current register write to DBM_GEN_CFG to update the current speed
is overwriting the entire register. Avoid this, as this also
disables ZLT support on DBM. During validation of QDSS, a QDSS data
stall was seen, as the QDSS BAM generated a ZLT, while DBM did not
enable it. DBM ZLT support is recommended to be enabled in the HPG.
Change-Id: Ieef4a42d3ac6f2a836a5c25530492c95669047b0
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
There is a case where of-thermal invokes thermal zone re-evaluation
for a zone even if it is disabled during sensor violation. It may
lead to thermal zone throttling even if that thermal zone is disabled.
Update of-thermal to re-evaluate thermal zone only if it is in
enabled state.
Change-Id: I0764d4719668231d27b4e264c46e5593653d90b3
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
Free QDSS memory on every SSR and allocate it again
when QDSS trace memory indication is received from FW.
Change-Id: I1f4ed9dbfc597407992d2484deaf3767ce0d6c3c
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Enable QSEECOM,QRNG,smcinvoke config as modules.
Also enable the QTI crpto tz driver config, needed to enable
QTI inline encryption and disable HWKM as this is not
supported on HW.
1.CONFIG_QSEECOM=m
2.CONFIG_HW_RANDOM_MSM_LEGACY=m
3.CONFIG_QCOM_SMCINVOKE=m
4.CONFIG_QTI_CRYPTO_TZ=m.
Change-Id: Ie8730f1ab025d75ecbaf7c6937323e12b9438530
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
Some of the SoCs may not have support "rmb_general_purpose" register,
So handle the error path to load the firmware from kernel.
Change-Id: Id64c8e531bb6fe79ea40e6fa34b20aa2e1891ad8
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
DWC3 XMIT_DEV command is timing out for USB function wakeup functionality
with current 500 iterations (i.e. timeout comes around 300us). USB DWC3
controller shall take more time to process this particular command. Hence
increase retry count from 500 to 3000 iterations (i.e same as dwc3 endpoint
command timeout value) to have sucessful USB function wakeup functionality.
Change-Id: I1b5a9dd64a01ad9592a04c275beef77eaee523be
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Set parent of touch device so that sysfs path to be
used by TUI App is proper.
Change-Id: Ibb714151a2dcb6789428fdb0a9759a86568cd135
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Configure QoS settings during probe for all nodes instead of for each
node individually upon first client request.
Change-Id: I10fd747460165352188c075e999c62b13e1122c2
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Enable storage and fs related configs for monaco.
Change-Id: I999bd9b770987bacccc0f5500c9d3bc1054cf21e
Signed-off-by: Sridhar Arra <sarra@codeaurora.org>
Some devices which support disable cpu0 can not disable cpu0,
so add psci_cpu_can_disable() function to make all cpus can
disable.
Change-Id: Iaed4129abfc1283c6371bc11bbe5ae4e66317280
Signed-off-by: Teng Fei Fan <tengfei@codeaurora.org>
Add the MIDR part number info for the Arm Cortex-A78.
Change-Id: I0ce8b2d01f95318ce7a2fc4c389a17400f74d36e
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
