Convert clock operation to byte2 ops to meet DISPCC requirement.
Clock unit is changed from KHZ to HZ. Added link clock parent as
freq table is no longer supported in byte2 ops.
Change-Id: Iefeca1ecf7fb6335c45f7664a661d1bbe2d6f1e5
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Signed-off-by: Nilesh Laad <quic_nlaad@quicinc.com>
Changes to support eDP display detection and bringup
through panel power sequencing.
Change-Id: Ie20906467c209872296e8b5475cee0ca98a3b232
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Signed-off-by: Nilesh Laad <quic_nlaad@quicinc.com>
Add support for new eDP interface. As the protocol is similar to DP,
the new eDP driver shall re-use the DP functionality wherever applicable.
Change-Id: I0bcaa2bf2c401cbfb3470ecf232bf6643fb43a7d
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Signed-off-by: Nilesh Laad <quic_nlaad@quicinc.com>
Changes to support DP display as primary. The connector should
indicate the display type as primary to the drm library.
Change-Id: Ib5f6d9d72e8c42f88d38e06ed504848b8fc52029
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Signed-off-by: Nilesh Laad <quic_nlaad@quicinc.com>
Parse pixel base offset from "qcom,pixel-base-off" node in device
tree to differentiate pixel base offset in different hardwares.
Change-Id: Ia8eac1a7c3dba3eaff6b88cd7f6a467f288cdf4b
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Signed-off-by: Nilesh Laad <quic_nlaad@quicinc.com>
Drop refcount on pm_suspend commit state if atomic
commit is skipped due to failure. It will avoid frame
trigger during pm_resume call.
Change-Id: Iecd98b106454c82c81a1ef9faaf1af4be2bf19e6
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
In some cases HAL sets CRTC_PROP_IDLE_TIMEOUT property to zero
and idle_notify_work which is already scheduled will send notfication
on timer expire. This will cause janks in subsequent commit. This
change cancels the existing delayed idle_notify work and will get
rescheduled after frame trigger if CRTC_PROP_IDLE_TIMEOUT property is
non zero.
Change-Id: I8b9ebce8282425f55838b94cfd345b5e733fa645
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Acquire dsi_ctrl->ctrl_lock lock before programming dsi ctrl
registers. Failing this may lead to race conditions in register
programming.
Add missing mutex lock inside dsi_ctrl_host_timing_update().
Change-Id: Ic86cbe282333c0b4d63ae3d5b3356a5d24752203
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
Initialize pll clocks to NULL and warn if dsi select clocks are not
defined in device-tree.
Change-Id: If831692021278b020d49c06c3bb15d631c0376a4
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Currently the panel esd_recovery_pending flag is cleared for every mode
set. The ESD recovery completes only after the suspend and resume. Clear
the flag only during power on commit.
Change-Id: I97e370feba0aad34558e4675168b4bcb7f5901ca
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Remove the YUV format setting, will use the upstream code
for YUV mode check.
Change-Id: I24f059ff7cd4cf64f41d7f77bfa6517df0cccfde
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
This change copies msm_fbdev.c from msm-5.14 kernel, which adds
frame buffer support to display driver. And this file is from
msm-5.4 commit <5fce077d> ("drm: msm: Fix the format prints in
display driver").
Change-Id: I113cb6441334ff6b61cfd15cf863c325d51091b4
Signed-off-by: Kai Xing <quic_kxing@quicinc.com>
Add required changes to makefile and enable the gki
config keys for kona target compilation.
Change-Id: I39422750ac6000078278ddc7705e7148f6b0ae6b
Signed-off-by: Kai Xing <quic_kxing@quicinc.com>
Disable DSI ctrl regulator while entering deepsleep and restore
during resume. Refactor deepsleep related code to helper function.
Change-Id: If6da0471db59fbdfa9d9855ee1464fcab90cae15
Signed-off-by: Venkata Prahlad Valluru <quic_vvalluru@quicinc.com>
Signed-off-by: Sai Srujana Oruganti <quic_osaisruj@quicinc.com>
In case of dual dsi usecase, since both the encoders use
the same CTL path, this change ensures that uidle ctl
settings are updated only by the master encoder.
Change-Id: I7bd75ae0195d34f0c1810403fa5e390fbaa64ed0
Signed-off-by: Yashwanth <quic_yvulapu@quicinc.com>
This change enables minidump for register dumps, debug bus collection
based on CONFIG_QCOM_VA_MINIDUMP config. The minidump driver in 5.4 kernel
needs physical contiguous memory allocation as a requirement. The
minidump collection failure is seen with commit fdf36d7124
("disp: msm: use vzalloc for large allocations") and it uses
vzalloc to address memory allocation failure with order 5. This
patch will disable minidump collection for regdumps, debug bus
to address minidump collection failure.
Change-Id: If5ff91ff95279ee2997765599dbeab16ac2dae60
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
This property skips the panel power off for panels
with in-cell design.
Change-Id: I61ff7b8696940b74a58c79eef5b9cd43fd551c01
Signed-off-by: Sai Srujana Oruganti <quic_osaisruj@quicinc.com>
When there is no ulp load entry, ulp load should be set to
enable load.
Change-Id: I531108b4d2137cf9262874bc411ff06592302374
Signed-off-by: Sai Srujana Oruganti <quic_osaisruj@quicinc.com>
Currently we are handling only write command transfer failures from
dsi host transfer path. Modify check to handle read command transfer
failures.
Change-Id: Iee1dbf46a4374819e6d6425eb5acece8ec1fb8b1
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Currently link clk parent set/unset are done as part of dsi_prepare
and dsi_unprepare, but in case of deepsleep with display ON, these
will not be called. Due to mismatch in parent between clk
framework and actual parent, subsequent clk_set_parent will
early return without setting the parent.
To avoid this condition, do set parent to xo, as part of
pm_suspend and restore to link clk source in pm_resume.
Change-Id: I626899304580f9d9fbcc92cd8b139cd89cd48999
Signed-off-by: Venkata Prahlad Valluru <quic_vvalluru@quicinc.com>
It has been observed that TE check may fail even if status read
is passing. Panel detection should be successful only if both
TE check and register read (if supported) pass.
Change-Id: I8d2c5d4139561fe533fc148124b7dde54b63c24e
Signed-off-by: Kashish Jain <quic_kashjain@quicinc.com>
Large allocations using kzalloc can lead to timeouts. This updates
the allocation calls accordingly to use vzalloc to remove
requirements on contiguous memory.
Change-Id: Ica54483787509ed0e9283289fc9d523e8cde9238
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Adjust the data width calculation to reduce the rounding off error
when the widebus is enabled.
Change-Id: Ia2fa4536ce519548989e2befcb22fb685f286c9e
Signed-off-by: Kashish Jain <quic_kashjain@quicinc.com>
When device boots from hibernation, probe function is not called
and rsc need to initialize the hw at the first client update call.
Change-Id: Iba3a3aaebbb8052ce93b8aac1746f33ea80795fb
Signed-off-by: Sai Srujana Oruganti <quic_osaisruj@quicinc.com>
Current logic will unnecessarily call backlight update
twice in cases where backlight level is changing. When
this happens, there is a potential delay waiting for the
first command to complete before sending the second
backlight update with the same value. This change removes
one backlight call and now only calls update if the
property is marked as dirty.
Change-Id: I260f0d73b3a5af9ced7ae261d247595f965a8d9e
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
In DMA start window scheduling, TRIG_CTRL.COMMAND_MODE_DMA_TRIGGER_SEL
is programmed to SW + DMA start window trigger. But if DMS switch
comes after command is scheduled, COMMAND_MODE_DMA_TRIGGER_SEL gets
reprogrammed to SW trigger leading to command transfer failure.
Program the COMMAND_MODE_DMA_TRIGGER_SEL only from the CMD DMA Tx path.
Change-Id: I01062497bb70aa5fdcb25be3715c7cbc4c68b681
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
Changes are made to get minimum ib vote for each bus from
device tree entries rather than static values.
Change-Id: Ibecb44ac6b8673c5d5b8979014c215ab3ce9e43f
Signed-off-by: Andhavarapu Karthik <quic_kartkart@quicinc.com>
Add changes to validate the plane fb_translation mode
and dma_buf flags of drm_gem_obj attached to plane. It
avoids device panic on S2 translation fault and fails the
drm_atomic_commit for which mismatch is detected. In
current codeflow, only S1 mappings are modified when dma_buf
is detached from Non_sec CB and attached to secure SB as part
of msm_gem_get_iova_locked API, but S2 mapping entries are
not modified and this crash is seen.
Change-Id: I6bced92994cd8681cf69231e41bec0c262dafd33
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
The destination format for compressed rgb101010 should be
the same as rgb888. After adding uncompressed RGB101010 support,
the programming for compressed rgb101010 went wrong.
Fix this to re-enable compressed rgb101010 format support.
Change-Id: I805e15df14dda8ff0653a0dba8c4efe3fe0681fd
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
