The API - cnss_pci_set_max_link_speed sets max pcie link speed based
RC number, and affect other endpoints for PCIe switch platform. So,
don't set max link speed if dtsi configuration - "default_gen_speed"
is invalid.
Change-Id: I2b9263fb6c0b45dcb19cdc112fb04767648016f4
Signed-off-by: Wu Gao <wugao@codeaurora.org>
Move definition of IPA_ETH_API_VER to msm_ipa.h so it
can be accessed by IPACM and other user space modules.
Change-Id: Ib4dafe1db310b352bbbb08018fc9e63c398cb09a
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
This change adds the needed support to enable best fit algorithm
for iova allocation. Best fit algorithm helps in reducing fragmentation
and thus utilizing the iova address space more efficiently.
Change-Id: Icaa9bf1db534eba75c1b5724b6210240e4e6faef
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
Register msm_nand to panic notifiers list to dump apss
qpic bam registers information during any subsytem failures.
Change-Id: If717d063b41dc8e75b707574e4f703ea4b41da65
Signed-off-by: Pradeep P V K <pragalla@codeaurora.org>
write_seqcount_begin expects to be called from a non-preemptible
context to avoid preemption by a read section that can spin due
to an odd value. But the readers of vm_sequence never retries and
thus writers need not disable preemption. Use the non-lockdep
variant as lockdep checks are now in-built to write_seqcount_begin.
Bug: 161210518
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Change-Id: If4f0cddd7f0a79136495060d4acc1702abb46817
Git-commit: c9201630e8a53106406516ba40862e637c324480
Git-repo: https://android.googlesource.com/kernel/common/
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
Fix incomplete fw_build_id in IPC logging due to MAX
character limit. Cleaned up in debug code.
Change-Id: Ia0f104158645e27f774d9598883cfcd8ec765d3c
Signed-off-by: Naman Padhiar <quic_npadhiar@quicinc.com>
Add new ioctls for rmnet to reg/unreg for yellow water mark hit
notifications.
Change-Id: Ib1162213e8fc463efaaa1149330e889110dc3dab
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
The current implementation does not check for D value is within
the accepted range for a given M & N value. Update the logic to
calculate the final D value based on the range. While at it, add
support for 2/3 divider in frac_table_pixel.
Change-Id: Ia42b9197de6d594129b1a48106f8e5a2be70a1c6
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Macro for detecting consolidated stats structure mismatch
between ipa_lnx_agent and IPA stats module.
Change-Id: I5322d432710a798305b6943a0e4b379880eabab9
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
This change increases MBIM IN aggregation and related TRB buffer size
from 16KB to 31KB. With this aggregation change, DL throughput is
increased form 4.2 Gbps to 4.7 Gbps. Also reduced OUT buffer size from
31KB to 16 KB (i.e. as equal to size of OUT aggregation).
Change-Id: Ida6444536f27f385034fefc71e663d7b7ce5626f
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
CONFIG_SCHED_DEBUG maintains scheduler statistic debug information
and can accessed the data dynamically.
On user builds, its not needed to enable debug related information,
so disable the scheduler debug.
It can improve system performance and network throughput too.
Change-Id: Ic0ca28d49210266fc5931979cde7f72a5c421e79
CRs-Fixed: 3048893
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Signed-off-by: Jianmin Zhu <jianminz@codeaurora.org>
Ensure that the payload being copied to the connection's recv_buff
buffer does not exceed the buffer's maximum size.
Change-Id: Ic0e0b894e7746430916b24f45e583822ccea2748
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
recent changes in debugfs dont allow to create directories till fs_init
call level, but some cpu clock drivers populate OPP table in prior init
call levels, the energy model debugfs population called from the OPP
framework, before debugfs initialization. This breaks energy model
population in debugfs.
Fix it by not allowing energy model population prior to debugfs init call,
and populate debugfs entries, if power domains already created.
Change-Id: I2fb747b2c033fa83d362fea1ff815a628448b00f
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
Currently we directly send all oob requests to gmu. This
creates timeout waiting for ack when a thread attempts
to do oob set for oob_perfcntr while it was already set
by another thread because gmu firmware does not send ack
to second thread. Add and a counter inside device mutex's
protection for oob_perfcntr requests so that we only send
first oob set and last oob clear requests to gmu.
Change-Id: I702e9f1c45ec5dd9a24822300a7810dd390f1c7e
Signed-off-by: Pranav Patel <pranavp@codeaurora.org>
I2C interrupts get enabled/disabled during transfers,if a
client driver tries to do transfer as part of early system
resume, i2c interrupts may not fire as they are not
registered as EARLY_RESUME IRQ's.
Change is to register interrupt as IRQF_EARLY_RESUME.
Change-Id: Iecbe887c51302dc64632ef45daee4e5ba3d18aa2
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
Changes are to save and restore PCI switch config space as part
of system suspend/resume scenario.
Change-Id: I30a1024e1fb7f70e2274d6a6347fdce6e5b019cd
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
A couple of instances are observed in which MHI got D3hot and D0 in
a very short span, but the device processed D0 first and D3hot later.
This is resulting s/w state machine going out of sync with h/w
resulting MHI driver to trigger syserr.
Below is the sequence of events:
1) received: EP_PCIE_PM_D3_HOT_EVENT
2) IPA DMA successfully disabled
3) received: EP_PCIE_PM_D0_EVENT
4) Start handling EP_PCIE_PM_D0_EVENT, Current states M-3, D0
Nothing to do, already in D0 state
5) Start handling EP_PCIE_PM_D3_HOT_EVENT, Current state M-3, D0
6) Start handling MHI_DEV_EVENT_M0_STATE, Current state M-3 & D3_HOT
MHI_DEV_EVENT_M0_STATE: illegal in current MHI states: M-3 & D3_HOT
Though both works (from the same work queue) are waiting on the same
mutex lock, somehow the work which is processing D0 got the lock first.
The only possibility is priority inversion.
To avoid this scenario use mhi_sm_wq for PCIe event which ensures one
execution at any given time.
commit <37ea867103f2>("msm: ep-pcie: Use threaded irq for PERST
de-assertion handling"), ensures PERST de-assertion events are handled
at max possible priority. So we don't really need high priority system
work queue for handling other PCIe events.
Change-Id: Id147bf8eae7b09999289c70be87dd98b9f68ba3b
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
* refs/heads/tmp-2385b6c:
ANDROID: ABI: Update allowed list for QCOM
FROMGIT: binder: make sure fd closes complete
FROMLIST: HID: Support Microsoft SPI touch digitizer driver
ANDROID: ABI: Update allowed list for QCOM
Change-Id: I94142d191889ee5a1ce4e11f618e2d6db0086909
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
1. Deprecate the ipa_eth_client_conn_evt/ipa_eth_client_disconn_evt.
2. Change the ipa_eth_intf_info structure.
a. pass the net_device structure directly.
b. new boolean flag to trigger periph conn/disconn event.
Change-Id: Ied288d6a914ac9c19d38adb82de239dd14913855
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Add IOCTL for setting a client's SRAM filtering rules priority as high.
This enables to enhance a specific client's performance.
Change-Id: I47b10334209da70aa401aad578199b68eddc6c87
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Adding kernel support for per-client statistics feature
to work with 2 IPA ETH clients.
Change-Id: I5fa510e7097a5ff24ea349cb094c3cd37b82ae1b
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
