mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-11-09 04:12:08 -05:00
d33d29ecb9
This change adds support to enable wakeup capabilities for gpios. Change-Id: I014b3d439be834ce17fa74eeb2993fc4bf9dd207
1522 lines
26 KiB
Devicetree
1522 lines
26 KiB
Devicetree
#include<dt-bindings/pinctrl/qcom,pmic-gpio.h>
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&soc {
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tlmm_pinmux: pinctrl@1000000 {
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compatible = "qcom,sdxnightjar-pinctrl";
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reg = <0x1000000 0x300000>;
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interrupts = <0 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&wakegic>;
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uart1_console_active: uart1_console_active {
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mux {
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pins = "gpio0", "gpio1";
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function = "blsp_uart1";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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trigout_a: trigout_a {
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mux {
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pins = "gpio92";
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function = "qdss_cti";
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};
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config {
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pins = "gpio92";
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drive-strength = <2>;
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bias-disable;
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};
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};
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uart2_console_active: uart2_console_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "blsp_uart2";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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uart3_console_active: uart3_console_active {
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mux {
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pins = "gpio8", "gpio9";
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function = "blsp_uart3";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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uart3_console_sleep: uart3_console_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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/* I2C CONFIGURATION */
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i2c_1 {
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i2c_1_active: i2c_1_active {
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mux {
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pins = "gpio2", "gpio3";
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function = "blsp_i2c1";
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};
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config {
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c_1_sleep: i2c_1_sleep {
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mux {
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pins = "gpio2", "gpio3";
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function = "blsp_i2c1";
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};
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config {
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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i2c_2 {
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i2c_2_active: i2c_2_active {
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mux {
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pins = "gpio6", "gpio7";
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function = "blsp_i2c2";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c_2_sleep: i2c_2_sleep {
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mux {
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pins = "gpio6", "gpio7";
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function = "blsp_i2c2";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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i2c_3 {
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i2c_3_active: i2c_3_active {
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mux {
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pins = "gpio10", "gpio11";
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function = "blsp_i2c3";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c_3_sleep: i2c_3_sleep {
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mux {
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pins = "gpio10", "gpio11";
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function = "blsp_i2c3";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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i2c_4 {
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i2c_4_active: i2c_4_active {
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mux {
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pins = "gpio14", "gpio15";
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function = "blsp_i2c4";
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};
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config {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c_4_sleep: i2c_4_sleep {
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mux {
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pins = "gpio14", "gpio15";
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function = "blsp_i2c4";
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};
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config {
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pins = "gpio14", "gpio15";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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bmi160_int1_default: bmi160_int1_default {
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mux {
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pins = "gpio0";
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function = "gpio";
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};
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config {
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pins = "gpio0";
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drive-strength = <12>;
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bias-pull-down;
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};
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};
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bmi160_int2_default: bmi160_int2_default {
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mux {
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pins = "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio1";
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drive-strength = <12>;
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bias-pull-down;
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};
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};
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cnss_pins {
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cnss_wlan_en_active: cnss_wlan_en_active {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_wlan_en_sleep: cnss_wlan_en_sleep {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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cnss_sdio_active: cnss_sdio_active {
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mux {
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pins = "gpio37";
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function = "gpio";
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};
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config {
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pins = "gpio37";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_sdio_sleep: cnss_sdio_sleep {
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mux {
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pins = "gpio37";
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function = "gpio";
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};
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config {
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pins = "gpio37";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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/* SPI CONFIGURATION */
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spi_1 {
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spi_1_active: spi_1_active {
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mux {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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function = "blsp_spi1";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_1_sleep: spi_1_sleep {
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mux {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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function = "blsp_spi1";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2",
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"gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_2 {
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spi_2_active: spi_2_active {
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mux {
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pins = "gpio4", "gpio5", "gpio6",
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"gpio7";
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function = "blsp_spi2";
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};
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config {
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pins = "gpio4", "gpio5", "gpio6",
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"gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_2_sleep: spi_2_sleep {
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mux {
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pins = "gpio4", "gpio5", "gpio6",
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"gpio7";
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function = "blsp_spi2";
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};
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config {
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pins = "gpio4", "gpio5", "gpio6",
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"gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_3 {
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spi_3_active: spi_3_active {
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mux {
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pins = "gpio8", "gpio9", "gpio10",
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"gpio11";
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function = "blsp_spi3";
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};
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config {
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pins = "gpio8", "gpio9", "gpio10",
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"gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_3_sleep: spi_3_sleep {
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mux {
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pins = "gpio8", "gpio9", "gpio10",
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"gpio11";
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function = "blsp_spi3";
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};
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config {
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pins = "gpio8", "gpio9", "gpio10",
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"gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_4 {
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spi_4_active: spi_4_active {
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mux {
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pins = "gpio16", "gpio17", "gpio18",
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"gpio19";
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function = "blsp_spi4";
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};
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config {
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pins = "gpio16", "gpio17", "gpio18",
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"gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_4_sleep: spi_4_sleep {
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mux {
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pins = "gpio16", "gpio17", "gpio18",
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"gpio19";
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function = "blsp_spi4";
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};
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config {
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pins = "gpio16", "gpio17", "gpio18",
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"gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_wlan_gpio {
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sdc2_wlan_gpio_active: sdc2_wlan_gpio_active {
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mux {
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pins = "gpio80";
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function = "gpio";
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};
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config {
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pins = "gpio80";
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output-high;
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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sdc2_wlan_gpio_sleep: sdc2_wlan_gpio_sleep {
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mux {
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pins = "gpio80";
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function = "gpio";
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};
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config {
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pins = "gpio80";
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drive-strength = <2>;
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bias-pull-down;
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output-low;
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};
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};
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};
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/* SMB CONFIGURATION */
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pmx_smb_stat {
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smb_stat_active: smb_stat_active {
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mux {
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pins = "gpio83";
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function = "gpio";
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};
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config {
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pins = "gpio83";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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pcie0 {
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pcie0_clkreq_default: pcie0_clkreq_default {
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mux {
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pins = "gpio64";
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function = "pcie_clkreq";
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};
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config {
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pins = "gpio64";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_perst_default: pcie0_perst_default {
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mux {
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pins = "gpio60";
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function = "gpio";
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};
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config {
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pins = "gpio60";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie0_wake_default: pcie0_wake_default {
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mux {
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pins = "gpio61";
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function = "gpio";
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};
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config {
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pins = "gpio61";
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drive-strength = <2>;
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bias-disable;
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};
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};
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pcie0_mdm2apstatus_default: pcie0_mdm2apstatus_default {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie_ep_perst_default: pcie_ep_perst_default {
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mux {
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pins = "gpio65";
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function = "gpio";
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};
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config {
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pins = "gpio65";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie_ep_wake_default: pcie_ep_wake_default {
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mux {
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pins = "gpio61";
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function = "gpio";
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};
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config {
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pins = "gpio61";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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/* UART HS CONFIGURATION */
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blsp1_uart1_active: blsp1_uart1_active {
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mux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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function = "blsp_uart1";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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};
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blsp1_uart1_sleep: blsp1_uart1_sleep {
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mux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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};
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blsp1_uart2_active: blsp1_uart2_active {
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mux {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "blsp_uart2";
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};
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config {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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blsp1_uart2_sleep: blsp1_uart2_sleep {
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mux {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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blsp1_uart3_active: blsp1_uart3_active {
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mux {
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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function = "blsp_uart3";
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};
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config {
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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|
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blsp1_uart3_sleep: blsp1_uart3_sleep {
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mux {
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|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4_active: blsp1_uart4_active {
|
|
mux {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4_sleep: blsp1_uart4_sleep {
|
|
mux {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_active: blsp1_uart4b_active {
|
|
mux {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_sleep: blsp1_uart4b_sleep {
|
|
mux {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
mdss_cs_active: mdss_cs_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_cs_sleep: mdss_cs_sleep {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_te_active: mdss_te_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_te_sleep: mdss_te_sleep {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_rs_active: mdss_rs_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_rs_sleep: mdss_rs_sleep {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_ad_active: mdss_ad_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "ebi2_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_ad_sleep: mdss_ad_sleep {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "ebi2_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
mdss_bl_active: mdss_bl_active {
|
|
mux {
|
|
pins = "gpio68";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio68";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
mdss_bl_sleep: mdss_bl_sleep {
|
|
mux {
|
|
pins = "gpio68";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio68";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
wcd9xxx_intr {
|
|
wcd_intr_default: wcd_intr_default {
|
|
mux {
|
|
pins = "gpio94";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio94";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* pull down */
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
spkr_1_wcd {
|
|
spkr_1_wcd_en_active: spkr_1_wcd_en_active {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
spkr_1_wcd_en_sleep: spkr_1_wcd_en_sleep {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2s_mclk {
|
|
i2s_mclk_sleep: i2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio71";
|
|
function = "i2s_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio71";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
i2s_mclk_active: i2s_mclk_active {
|
|
mux {
|
|
pins = "gpio71";
|
|
function = "i2s_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio71";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
pmx_pri_mi2s_aux {
|
|
pri_ws_sleep: pri_ws_sleep {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_sck_sleep: pri_sck_sleep {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_dout_sleep: pri_dout_sleep {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_ws_active_master: pri_ws_active_master {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "pri_mi2s_ws_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pri_sck_active_master: pri_sck_active_master {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "pri_mi2s_sck_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pri_ws_active_slave: pri_ws_active_slave {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "pri_mi2s_ws_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
pri_sck_active_slave: pri_sck_active_slave {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "pri_mi2s_sck_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
pri_dout_active: pri_dout_active {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "pri_mi2s_data1_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_pri_mi2s_aux_din {
|
|
pri_din_sleep: pri_din_sleep {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_din_active: pri_din_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "pri_mi2s_data0_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_aux {
|
|
sec_ws_sleep: sec_ws_sleep {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_sck_sleep: sec_sck_sleep {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_dout_sleep: sec_dout_sleep {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_ws_active_master: sec_ws_active_master {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "sec_mi2s_ws_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_sck_active_master: sec_sck_active_master {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "sec_mi2s_sck_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_ws_active_slave: sec_ws_active_slave {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "sec_mi2s_ws_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_sck_active_slave: sec_sck_active_slave {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "sec_mi2s_sck_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_dout_active: sec_dout_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "sec_mi2s_data1_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_aux_din {
|
|
sec_din_sleep: sec_din_sleep {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_din_active: sec_din_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "sec_mi2s_data0_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_b_aux {
|
|
sec_ws_b_sleep: sec_ws_b_sleep {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_sck_b_sleep: sec_sck_b_sleep {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_dout_b_sleep: sec_dout_b_sleep {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_ws_b_active_master: sec_ws_b_active_master {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "sec_mi2s_ws_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_sck_b_active_master: sec_sck_b_active_master {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "sec_mi2s_sck_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_ws_b_active_slave: sec_ws_b_active_slave {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "sec_mi2s_ws_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_sck_b_active_slave: sec_sck_b_active_slave {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "sec_mi2s_sck_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_dout_b_active: sec_dout_b_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "sec_mi2s_data1_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_b_aux_din {
|
|
sec_din_b_sleep: sec_din_b_sleep {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_din_b_active: sec_din_b_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "sec_mi2s_data0_b";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sdc1_clk_on: sdc1_clk_on {
|
|
config {
|
|
pins = "sdc1_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <16>; /* 16 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_clk_off: sdc1_clk_off {
|
|
config {
|
|
pins = "sdc1_clk";
|
|
bias-disable; /* NO pull */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cdc_reset_ctrl {
|
|
cdc_reset_sleep: cdc_reset_sleep {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cdc_reset_active:cdc_reset_active {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <8>;
|
|
bias-pull-down;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
sdc1_cmd_on: sdc1_cmd_on {
|
|
config {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_cmd_off: sdc1_cmd_off {
|
|
config {
|
|
pins = "sdc1_cmd";
|
|
num-grp-pins = <1>;
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_data_on: sdc1_data_on {
|
|
config {
|
|
pins = "sdc1_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <10>; /* 10 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_data_off: sdc1_data_off {
|
|
config {
|
|
pins = "sdc1_data";
|
|
bias-pull-up; /* pull up */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
sdc1_wlan_gpio {
|
|
sdc1_wlan_gpio_active: sdc1_wlan_gpio_active {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
output-high;
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
sdc1_wlan_gpio_sleep: sdc1_wlan_gpio_sleep {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
pinctrl_pps: ppsgrp {
|
|
mux {
|
|
pins = "gpio39";
|
|
function = "nav_dr";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio39";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
can_reset {
|
|
can_rst_on: rst_on {
|
|
mux {
|
|
pins = "gpio68";
|
|
function = "gpio";
|
|
};
|
|
|
|
|
|
config {
|
|
pins = "gpio68";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
can_rst_off: rst_off {
|
|
mux {
|
|
pins = "gpio68";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio68";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-up;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmd9650_gpios {
|
|
gpio@c100 { /* GPIO 2 - VADC */
|
|
/* GPIO should be left off, and in the high
|
|
* impedance state when the pin is used with the VADC
|
|
*/
|
|
pins = "gpio2";
|
|
function = "normal";
|
|
bias-high-impedance; /* DISABLE GPIO */
|
|
};
|
|
|
|
gpio@c200 { /* GPIO 3 - LED */
|
|
pins = "gpio3";
|
|
function = "normal";
|
|
bias-high-impedance; /* DISABLE GPIO */
|
|
};
|
|
|
|
usb_id_detect: gpio@c400 { /* GPIO 5 - USB_ID */
|
|
pins = "gpio5";
|
|
function = "normal";
|
|
input-enable; /* Digital input */
|
|
bias-pull-up;
|
|
qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_1P5>; /* Pull up 1.5 uA */
|
|
power-source = <1>; /* 1.8 V */
|
|
};
|
|
|
|
gpio@c500 { /* GPIO 6 - Rome 3.3V control */
|
|
status = "ok"
|
|
qcom,mode = <1>; /* Digital output*/
|
|
qcom,output-type = <0>; /* CMOS logic */
|
|
qcom,invert = <1>; /* Output high */
|
|
qcom,vin-sel = <0>; /* VPH_PWR */
|
|
qcom,src-sel = <0>; /* Constant */
|
|
qcom,out-strength = <1>; /* High drive strength */
|
|
qcom,master-en = <1>; /* Enable GPIO */
|
|
};
|
|
};
|