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| Filename | Latest commit message | Latest commit date |
|---|---|---|
The clock and data lanes have a calibration circuitry feature. To offset the drive strength from the calibrated value in an increasing or decreasing manner, use 6 bit two’s complement values. Change-Id: I1cb612b4f62ea6af07165ffd1fb8e15528200e5e Signed-off-by: houdz1 <houdz1@lenovo.com> Reviewed-on: https://gerrit.mot.com/1850370 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Yeqing Wang <wangyq13@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key |
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| config | ||
| hdcp | ||
| include | ||
| msm | ||
| rotator | ||
| tinydrm | ||
| Android.bp | ||
| display_kernel_headers.py | ||
| Makefile | ||
| NOTICE | ||