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| Filename | Latest commit message | Latest commit date |
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Some targets need to set the MSI address size same as the PCIe data size(bytes) that PCIe core will halt for each write transaction. Hence add a property to pass the exponent (base 2) value for the size. Not setting this value same as PCIe core write halt size results into a deadlock on system bus. Change-Id: I9d8dd27fdb7ee25d5673a0fc96bf43f0aa6013ab |
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