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Jack Pham cecd0dc415 ARM: dts: msm: Specify address/size cells for &soc on lahaina-rumi
When lahaina-rumi is compiled as a separate overlay, it does
not explicitly include the definition of the &soc node. Without
the #address-cells and #size-cells specifiers, the compiler uses
default values of 2 and 1, respectively, which results in the
following warnings when compiling lahaina-rumi-overlay.dtb:

  Warning (reg_format): "reg" property in
/fragment@15/__overlay__/usb_emu_phy@a720000 has invalid length (8
bytes) (#address-cells == 2, #size-cells == 1) Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/fragment@15/__overlay__/usb_emu_phy@a720000
  Warning (avoid_default_addr_size): Relying on default #size-cells
value for /fragment@15/__overlay__/usb_emu_phy@a720000

As the &soc node is referenced here only for the purpose of adding
a new child node, usb_emu_phy, address the warnings by explicitly
defining the {address,size}-cells values.

Change-Id: I8b5ebcd53c060eeea3c55bf9fb8e55093e7862f2
2020-01-30 22:45:35 -08:00
bindings Merge "bindings: soc: qcom: add QTI battery glink debug" 2020-01-28 02:41:31 -08:00
qcom ARM: dts: msm: Specify address/size cells for &soc on lahaina-rumi 2020-01-30 22:45:35 -08:00
Makefile ARM: dts: vendor: Add an initial Makefile to the vendor 2019-06-04 16:50:48 -07:00