A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: add pci DT nodes for PCIe switch for sdxlemur CPE"

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qctecmdr 2021-02-25 06:25:37 -08:00 • committed by Gerrit - the friendly Code Review server
commit 5fb8e3a56e
1 changed files with 36 additions and 0 deletions
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36
qcom/sdxlemur-mtp-cpe.dtsi
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@ -5,3 +5,39 @@
};
&pcie0 {
iommu-map = <0x0 &apps_smmu 0x0200 0x1>,
<0x100 &apps_smmu 0x0201 0x1>,
<0x208 &apps_smmu 0x0202 0x1>,
<0x210 &apps_smmu 0x0203 0x1>,
<0x218 &apps_smmu 0x0204 0x1>,
<0x300 &apps_smmu 0x0207 0x1>,
<0x400 &apps_smmu 0x0208 0x1>,
<0x500 &apps_smmu 0x020C 0x1>,
<0x501 &apps_smmu 0x020E 0x1>;
};
&pcie0_rp {
#address-cells = <5>;
#size-cells = <0>;
/* BDF 1.0.0 */
pcie0_bus1_dev0_fn0: pcie0_bus1_dev0_fn0 {
reg = <0 0 0 0 0>;
/* BDF 2.1.0 */
pcie0_bus2_dev1_fn0: pcie0_bus2_dev1_fn0 {
reg = <0x800 0x0 0x0 0x0 0x0>;
};
/* BDF 2.2.0 */
pcie0_bus2_dev2_fn0: pcie0_bus2_dev2_fn0 {
reg = <0x1000 0x0 0x0 0x0 0x0>;
};
/* BDF 2.3.0 */
pcie0_bus2_dev3_fn0: pcie0_bus2_dev3_fn0 {
reg = <0x1800 0x0 0x0 0x0 0x0>;
};
};
};