A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add ice core clock node for shima"

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qctecmdr 2020-09-01 17:18:52 -07:00 • committed by Gerrit - the friendly Code Review server
commit 68792a4de3
1 changed files with 6 additions and 2 deletions
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8
qcom/shima.dtsi
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@ -1598,8 +1598,12 @@
<GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_ICE_CORE_CLK>;
clock-names = "core", "iface", "ice_core";
qcom,ice-clk-rates = <300000000 100000000>;
interconnects = <&aggre1_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDC_1>;