A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "iommu: arm-smmu: optimize arch write sync delay"

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This commit is contained in:
qctecmdr 2021-02-03 07:49:38 -08:00 • committed by Gerrit - the friendly Code Review server
commit 75f7b23e75
1 changed files with 3 additions and 3 deletions
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6
drivers/iommu/arm-smmu.c
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@ -365,7 +365,8 @@ static void arm_smmu_arch_write_sync(struct arm_smmu_device *smmu)
return;
/* Read to complete prior write transcations */
id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID0);
id = arm_smmu_readl(smmu, ARM_SMMU_IMPL_DEF0, 0);
/* Wait for read to complete before off */
rmb();
@ -656,8 +657,6 @@ static void arm_smmu_power_off_atomic(struct arm_smmu_device *smmu,
{
unsigned long flags;
arm_smmu_arch_write_sync(smmu);
spin_lock_irqsave(&pwr->clock_refs_lock, flags);
if (pwr->clock_refs_count == 0) {
WARN(1, "%s: bad clock_ref_count\n", dev_name(pwr->dev));
@ -670,6 +669,7 @@ static void arm_smmu_power_off_atomic(struct arm_smmu_device *smmu,
return;
}
arm_smmu_arch_write_sync(smmu);
arm_smmu_disable_clocks(pwr);
pwr->clock_refs_count = 0;