mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 08:36:12 -04:00
ARM: dts: msm: Add PMU device nodes to SM6150
Add LLCC PMU, CPU PMU and DSU PMU device nodes to SM6150. Change-Id: I8985e8c8bcdd76bf2babacbf60c47c7f46b7c3d1
This commit is contained in:
parent
71d7e2b857
commit
7a0c8e97da
1 changed files with 19 additions and 0 deletions
|
|
@ -637,6 +637,12 @@
|
|||
};
|
||||
};
|
||||
|
||||
llcc_pmu: llcc-pmu@90cc000 {
|
||||
compatible = "qcom,llcc-pmu-ver2";
|
||||
reg = <0x090cc000 0x300>;
|
||||
reg-names = "lagg-base";
|
||||
};
|
||||
|
||||
llcc_bw_opp_table: llcc-bw-opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
BW_OPP_ENTRY( 150, 16); /* 2288 MB/s */
|
||||
|
|
@ -928,6 +934,19 @@
|
|||
};
|
||||
};
|
||||
|
||||
cpu_pmu: cpu-pmu {
|
||||
compatible = "arm,armv8-pmuv3";
|
||||
qcom,irq-is-percpu;
|
||||
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
dsu_pmu@0 {
|
||||
compatible = "arm,dsu-pmu";
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
cpus = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>,
|
||||
<&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
|
||||
};
|
||||
|
||||
qcom,msm-imem@146aa000 {
|
||||
compatible = "qcom,msm-imem";
|
||||
reg = <0x146aa000 0x1000>;
|
||||
|
|
|
|||
Loading…
Reference in a new issue