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pinctrl: distinguish reserve gpio list by macro definition
For each project has its own reserve gpio list. So we should have the way to distinguish it in every different products. We use a macro definition for this. If the gpios are not assigned to TZ, they should be removed from the list. Change-Id: I0837a3abdf8d7398aa2e7138563cb891b9f53780 Reviewed-on: https://gerrit.mot.com/2121376 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key
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4 changed files with 10 additions and 0 deletions
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@ -21,3 +21,4 @@ CONFIG_ZRAM_WRITEBACK=y
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# CONFIG_REGULATOR_QPNP_LCDB is not set
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CONFIG_AW882XX_STEREO_SMARTPA=y
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# CONFIG_MICRON_UFSHID is not set
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CONFIG_QUP0_SE2_AP=y
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@ -343,4 +343,7 @@ config PINCTRL_BLAIR
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Say Y here to compile statically, or M here to compile it as a module.
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If unsure, say N.
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config QUP0_SE2_AP
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bool "Set GPIO of QUP0_SE2 as AP side"
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endif
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@ -1,5 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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# Qualcomm pin control drivers
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ccflags-$(CONFIG_QUP0_SE2_AP) += -DQUP0_SE2_AP
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obj-$(CONFIG_PINCTRL_MSM) += pinctrl-msm.o
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obj-$(CONFIG_PINCTRL_APQ8064) += pinctrl-apq8064.o
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obj-$(CONFIG_PINCTRL_APQ8084) += pinctrl-apq8084.o
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@ -1593,7 +1593,11 @@ static const struct msm_pingroup blair_groups[] = {
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};
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static const int blair_reserved_gpios[] = {
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#ifdef QUP0_SE2_AP
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13, 14, 15, 16, -1
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#else
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13, 14, 15, 16, 45, 46, 56, 57, -1
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#endif
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};
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static const struct msm_gpio_wakeirq_map blair_mpm_map[] = {
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