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dt-bindings: arm: msm: Introduce qsee_ipc_irq_bridge bindings
QSEE needs to occasionally send sideband signals to APPS userspace. The qsee_ipc_irq_bridge creates a device node for userspace to poll on and posts notifications about interrupt and ssr events to this node. Change-Id: Ia895a1c6e5a31b762d61fef034244f245e1113e6
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bindings/arm/msm/qsee_ipc_irq_bridge.txt
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bindings/arm/msm/qsee_ipc_irq_bridge.txt
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Qualcomm Technologies, Inc. Secure Execution Environment IPC Interrupt Bridge
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[Root level node]
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Required properties:
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-compatible : should be "qcom,qsee-ipc-irq-bridge";
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[Second level nodes]
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qcom,qsee-ipc-irq-subsystem
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Required properties:
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-qcom,dev-name: the bridge device name
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-interrupt: IPC interrupt line from remote subsystem to QSEE
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-label : The name of this subsystem.
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Required properties if interrupt type is IRQ_TYPE_LEVEL_HIGH[4]:
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-qcom,rx-irq-clr : the register to clear the level triggered rx interrupt
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-qcom,rx-irq-clr-mask : the bitmask to clear the rx interrupt
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Example:
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qcom,qsee_ipc_irq_bridge {
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compatible = "qcom,qsee-ipc-irq-bridge";
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qcom,qsee-ipc-irq-spss {
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qcom,rx-irq-clr = <0x1d08008 0x4>;
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qcom,rx-irq-clr-mask = <0x2>;
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qcom,dev-name = "qsee_ipc_irq_spss";
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interrupts = <0 349 4>;
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label = "spss";
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};
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};
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