A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge db2bf32358 on remote branch

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Change-Id: I1f84ff3939c385d80e5b5be6cde8c5e2a5520541
This commit is contained in:
Linux Build Service Account 2021-03-17 01:40:08 -07:00
commit eea10c4d49
5 changed files with 46 additions and 4 deletions
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15
bindings/msm-cam-jpeg.txt
View file

@ -122,6 +122,21 @@ the device register map, interrupt map, clocks and regulators.
Definition: List of strings corresponds clock-rates levels.
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
- cam_hw_pid:
Usage: optional
Value type: <u32>
Definition: HW unique Pid values
- cam_hw_rd_mid:
Usage: optional
Value type: <u32>
Definition: HW port read mid value
- cam_hw_wr_mid:
Usage: optional
Value type: <u32>
Definition: HW port write mid value
Examples:
cam_jpeg_enc: qcom,jpegenc@ac4e000 {
cell-index = <0>;

1
lahaina-camera-sensor-hhg.dtsi
View file

@ -1,5 +1,4 @@
&cam_cci1 {
/delete-node/ qcom,eeprom5;
/delete-node/ qcom,cam-sensor5;
qcom,eeprom5 {

6
lahaina-camera.dtsi
View file

@ -1899,6 +1899,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegenc_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <25 26>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <1>;
status = "ok"
};
@ -1922,6 +1925,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegdma_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <24 27>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <1>;
status = "ok"
};
};

17
shima-camera.dtsi
View file

@ -412,6 +412,7 @@
<&apps_smmu 0x1400 0x440>,
<&apps_smmu 0x1440 0x440>;
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
dma-coherent-hint-cached;
cam-smmu-label = "ife", "ife-cdm";
multiple-client-devices;
ife_iova_mem_map: iova-mem-map {
@ -432,6 +433,7 @@
<&apps_smmu 0x2C40 0x400>;
cam-smmu-label = "jpeg";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
dma-coherent-hint-cached;
jpeg_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
@ -461,6 +463,7 @@
<&apps_smmu 0x2820 0x400>,
<&apps_smmu 0x2C20 0x400>;
qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>;
dma-coherent-hint-cached;
iova-region-discard = <0xdff00000 0x300000>;
cam-smmu-label = "icp";
icp_iova_mem_map: iova-mem-map {
@ -519,6 +522,7 @@
<&apps_smmu 0x2CC0 0x400>;
cam-smmu-label = "cpas-cdm";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
dma-coherent-hint-cached;
cpas_cdm_iova_mem_map: iova-mem-map {
iova-mem-region-io {
/* IO region is approximately 3.4 GB */
@ -1181,6 +1185,7 @@
ubwc-ipe-write-cfg = <0x161cf 0x161ef>;
ubwc-bps-fetch-cfg = <0x7073 0x707b>;
ubwc-bps-write-cfg = <0x161cf 0x161ef>;
qos-val = <0x00000A0A>;
status = "ok"
};
@ -1210,9 +1215,9 @@
clock-rates =
<0 0 0 300000000 0>,
<0 0 0 450000000 0>,
<0 0 0 525000000 0>,
<0 0 0 700000000 0>,
<0 0 0 700000000 0>;
<0 0 0 450000000 0>,
<0 0 0 450000000 0>,
<0 0 0 450000000 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal",
"turbo";
status = "ok"
@ -1281,6 +1286,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegenc_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <25 26>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <1>;
status = "ok"
};
@ -1304,6 +1312,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegdma_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <24 27>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <1>;
status = "ok"
};

11
yupik-camera.dtsi
View file

@ -391,6 +391,7 @@
<&apps_smmu 0xCE0 0x4E0>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>;
dma-coherent-hint-cached;
cam-smmu-label = "ife";
multiple-client-devices;
ife_iova_mem_map: iova-mem-map {
@ -412,6 +413,7 @@
cam-smmu-label = "jpeg";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>;
dma-coherent-hint-cached;
jpeg_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
@ -441,6 +443,7 @@
cam-smmu-label = "icp";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x10c00000 0xee300000>;
dma-coherent-hint-cached;
iova-region-discard = <0xdff00000 0x300000>;
icp_iova_mem_map: iova-mem-map {
iova-mem-region-firmware {
@ -498,6 +501,7 @@
cam-smmu-label = "cpas-cdm";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>;
dma-coherent-hint-cached;
cpas_cdm_iova_mem_map: iova-mem-map {
iova-mem-region-io {
/* IO region is approximately 3.4 GB */
@ -523,6 +527,7 @@
cam-smmu-label = "lrme";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x100000 0xffe00000>;
dma-coherent-hint-cached;
lrme_iova_mem_map: iova-mem-map {
iova-mem-region-shared {
/* Shared region is 100MB long */
@ -1065,6 +1070,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegenc_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <22 23>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <2>;
status = "ok"
};
@ -1088,6 +1096,9 @@
clock-rates = <600000000 0>;
src-clock-name = "jpegdma_clk_src";
clock-cntl-level = "nominal";
cam_hw_pid = <20 21>;
cam_hw_rd_mid = <0>;
cam_hw_wr_mid = <2>;
status = "ok"
};